Gonzalo’s Webpage
Gonzalo Arteaga
e-mail: arteag1@unlv.nevada.edu
About:
|
I was born and raised in
Las Vegas, Nevada where I attended Silverado high school and graduated with
the class of 2014. I subsequently attended UNLV where I graduated with a B.S.
in Electrical Engineering in the Fall of 2018 and a M.S. in Electrical
Engineering in the Fall of 2020. |
Projects:
EE420 - Low-Voltage Op-Amp (SP 2017)
EE421
– Switched-Mode Power Supply (FA 2017)
EE421L
– Even parity checking circuit (FA 2017)
EE421L –
Lab reports (FA 2017)
Transimpedance
Amplifier (SP18)
SPAD
Photon-counting circuits (SU 2018)
ECG720
— APD Analog Front-end (FA 2019)
ECG721
— Overview of analog Phase-locked loop design (SP 2020)
ECG722
— Design of KD1S modulator ADC (FA 2020)
Links to chip pages
TIA and
various structures test chip
Photon-counting
circuit test chip
Multi-Channel
ROIC for long-range LiDAR applications