Multi-channel readout integrated circuit for long range LiDAR applications

Contributors

Angsuman Roy (angsumanroy@gmail.com) 

Gonzalo Arteaga (arteag1@unlv.nevada.edu)

David Santiago (santid4@unlv.nevada.edu)

Jason Silic (jason.silic@unlv.edu)

James Skelly (james.skelly@unlv.edu)

Francisco Mata-carlos (matacarl@unlv.nevada.edu)

Sachin P Namboodiri (puruss1@unlv.nevada.edu)

Chip Orgainization

This design was done in collaboration with employees at Freedom photonics, CA. This chip is designed using Towerjazz’s 180nm SiGe BiCMOS process and occupies an area of 5 mm x 5 mm. The chip was taped out on June 2020 and it comprises the following circuits:

1) 8-channel current mode photon counting circuits

a. 4-channel current mode photon counting circuits (Design and layout by Sachin P Namboodiri)

b. 4-channel current mode photon counting circuits (Design and layout by Gonzalo Arteaga)

2) 8-channel voltage mode photon counting circuits (design by Freedom Photonics, layout by David Santiago @ UNLV, and Freedom Photonics)

3) 16 Low-voltage differential signaling (LVDS) transmitter (design by Freedom Photonics, layout by David Santiago @ UNLV, and Freedom Photonics)

4) Serial Peripheral Interface (SPI) circuits for appropriately biasing all modules (design by Freedom Photonics, layout by Jason Silic @ UNLV)

Figure 1. Complete chip layout