CMOS: Circuit Design, Layout, and
Simulation
General book information
Published by Wiley-IEEE. Browse the book’s table of contents or index.
ISBN 978-0-470-22941-5, Revised 2nd Edition, 2008
The book’s author is R. Jacob Baker. Buy at Amazon.com
Errata and (some) email correspondence are found here.
Instructors may
request an evaluation copy here.
Layout software and MOSIS information
Cadence Design System – Ubiquitous commercial CAD system with a generous university program
Electric
VLSI Design System – free and powerful CAD system
for chip design (schematics, layout, DRC, LVS, ERC, etc.)
The Windows LAyout System for Individuals (LASI) is located here.
Information on submitting chips to MOSIS can be found here.
SPICE software and MOSFET models
The book’s SPICE simulation examples are available in LTspice (*.asc), WinSpice (*.cir), or HSPICE (*.sp) formats.
The 50 nm and 1 um MOSFET models are found in cmosedu_models.txt (see also, BSIM4 manual).
|
Check out the videos here! |
SPICE |
Cadence |
Electric |
Figures (PDF) |
Figures (ppt) |
Solutions |
Problems* |
Chaps 1-10: CMOS Fundamentals
|
|
readme.pdf
|
using LTspice
|
Acrobat
|
Power point
|
To book probs
|
Symbols.doc
|
|
Chapter 1 – Introduction to CMOS
Design |
|||||||
|
Chapter 2 – The Well |
|||||||
|
Chapter 3 – The Metal Layers |
|||||||
|
Chapter 4 – The Active and Poly
Layers |
|||||||
|
Chapter 5 – Resistors,
Capacitors, MOSFETs |
|||||||
|
Chapter 6 – MOSFET Operation |
|||||||
|
Chapter 7 – CMOS Fabrication |
Ch7_spice.zip |
Ch7_cadence.zip |
Ch7_electric.zip |
Solns_7.pdf |
Ch7_hw.doc |
||
|
Chapter 8 – Electrical Noise: An
Overview |
|||||||
|
Chapter 9 – Models for Analog
Design |
|||||||
|
Chapter 10 – Models for Digital
Design |
|||||||
|
Chaps 11-15 Digital Design |
|
|
|
|
|
|
|
|
Chapter 11 – The Inverter |
|||||||
|
Chapter 12 – Static Logic Gates |
|||||||
|
Chapter 13 – Clocked Circuits |
|||||||
|
Chapter 14 – Dynamic Logic Gates |
|||||||
|
Chapter 15 – VLSI Layout Examples |
Ch15_spice.zip |
Solns_15.pdf |
Ch15_hw.doc |
||||
|
Chaps 16-19 Advanced Digital Design |
|
|
|
|
|
|
|
|
Chapter 16 – Memory Circuits |
|||||||
|
Chapter 17 – Sensing using DS
Modulation |
|||||||
|
Chapter 18 – Special Purpose CMOS
Circuits |
|||||||
|
Chapter 19 – Digital Phase-Locked
Loops |
|||||||
|
Chaps 20-24: Analog Design |
|
|
|
|
|
|
|
|
Chapter 20 – Current Mirrors |
|||||||
|
Chapter 21 – Amplifiers |
|||||||
|
Chapter 22 – Differential
Amplifiers |
|||||||
|
Chapter 23 – Voltage References |
|||||||
|
Chapter 24 – Operational Amplifiers
I |
|||||||
|
Chaps 25-29: Advanced Analog Design |
|
|
|
|
|
|
|
|
Chapter
25 – Dynamic Analog Circuits |
|||||||
|
Chapter
26 – Operational Amplifiers II |
|||||||
|
Chapter
27 – Nonlinear Analog Circuits |
|||||||
|
Chapter 28 – Data Converter Fundamentals |
|||||||
|
Chapter 29 – Data Converter
Architectures |
*These
problems are made available, in addition to the textbook problems, but without
written solutions since they would end up posted on the web.
Return to the CMOSedu.com page