CMOS: Circuit Design, Layout, and
Simulation, Revised Second Edition
General book
information
Published
by Wiley-IEEE,
ISBN 978-0-470-22941-5, Revised 2nd
Edition, 2008.
The book’s author
is R. Jacob Baker. Buy at Amazon.com.
The
CMOSedu Google Group is found here.
Browse the book’s table of contents or index.
Errata and (some) email correspondence are found here.
Layout software and MOSIS information
The
Electric VLSI Design System – free and powerful CAD system for chip design
(schematics, layout, DRC, LVS, ERC, etc.).
Cadence
Design System – Ubiquitous commercial CAD system with a generous university
program.
The Windows LAyout System for Individuals (LASI) is located here.
Information on submitting chips to MOSIS can be found here.
SPICE software and MOSFET models
The
book’s SPICE simulation examples are available in LTspice (*.asc), WinSpice (*.cir), or HSPICE (*.sp) formats.
The
50 nm and 1 um MOSFET models are found in cmosedu_models.txt (see
also, BSIM4 manual).
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Check out the videos here! |
SPICE |
Cadence IC51 |
Cadence IC61 |
Figures (PPT) |
Solutions |
Problems* |
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Chaps 1-10: CMOS Fundamentals |
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CAD
system |
Power
point |
Book
problems |
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Chapter 1 – Introduction to CMOS Design |
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Chapter 2 – The Well |
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Chapter 3 – The Metal Layers |
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Chapter 4 – The Active and Poly Layers |
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Chapter 5 – Resistors, Capacitors, MOSFETs |
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Chapter 6 – MOSFET Operation |
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Chapter 7 – CMOS Fabrication |
Ch7_spice.zip |
Ch7_IC51.zip |
Ch7_IC61.zip |
Ch7_Electric.zip |
Solns_7.pdf |
Ch7_hw.doc |
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Chapter 8 – Electrical Noise: An Overview |
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Chapter 9 – Models for Analog Design |
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Chapter 10 – Models for Digital Design |
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Chaps 11-15 Digital Design |
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Chapter 11 – The Inverter |
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Chapter 12 – Static Logic Gates |
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Chapter 13 – Clocked Circuits |
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Chapter 14 – Dynamic Logic Gates |
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Chapter 15 – VLSI Layout Examples |
Ch15_spice.zip |
Solns_15.pdf |
Ch15_hw.doc |
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Chaps 16-19 Advanced Digital Design |
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Chapter 16 – Memory Circuits |
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Chapter 17 – Sensing using DS Modulation |
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Chapter 18 – Special Purpose CMOS Circuits |
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Chapter 19 – Digital Phase-Locked Loops |
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Chaps 20-24: Analog Design |
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Chapter 20 – Current Mirrors |
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Chapter 21 – Amplifiers |
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Chapter 22 – Differential Amplifiers |
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Chapter 23 – Voltage References |
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Chapter 24 – Operational Amplifiers I |
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Chaps 25-30: Advanced Analog Design |
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Chapter 25 – Dynamic Analog Circuits |
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Chapter 26 – Operational Amplifiers II |
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Chapter 27 – Nonlinear Analog Circuits |
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Chapter 28 – Data Converter Fundamentals |
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Chapter 29 – Data Converter Architectures |
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Chapter 30 – Implementing Data Converters |
*These problems are made
available, in addition to the textbook problems, but without written solutions
since they would end up posted on the web.
Return to the CMOSedu.com
page