HSPICE can be used to simulate the circuits from
the CMOS books.
- The HSPICE compatible netlists are available in a single zip here.
- To ensure that HSPICE generates a data file for Avanwaves or Cscope add “.option post” to a netlist
- HPSICE doesn’t like .lib c:\path\my_models.txt but rather uses .include c:\path\my_models.txt (use .include instead of .lib for including models in a netlist)
- When using the BSIM3 model use Level=49 for HSPICE instead of Level=8
- When using the BSIM4 model use Level=54 for HSPICE instead of Level=14
- HSPICE netlists end in an “sp” (e.g. mynetlist.sp)
- Syntax for a switch in HSPICE is:
GS1 n1 n2 VCR
PWL(1) CLOCK,0 0.7499,1m 0.7501,10G
For example, if the
voltage difference between nodes CLOCK and ground (0) transitions through 0.75V
the switch, connected between nodes n1 and n2, will go from a short (1
milliohm) to an open (10 Gigaohms).
Electric VLSI Design Information
·
Here is the Electric setup where the Run Program
path seen below is (for example): C:\synopsys\Hspice_Z-2007.03\BIN\hspice.exe
·
Note that while the Run Program field is not
case sensitive the “with args:” field is
case sensitive (so use the uppercase names as seen)
· Note that Electric outputs netlists with a *.spi extension.
Running HSIM from the command window (Start -> Run -> then type Cmd) in Windows
· Ensure the HSPICE model levels are used as indicated above (e.g., BSIM3 is Level=49 instead of Level=8)
· Use exact same netlist as used with HSPICE simulations except replace .options post with .print v(*) Level=1
· .print v(*) Level=1 saves node voltages from the main, or top level, cell. Level=2 stores node voltages from both the top level cell and the cells directly instanced in the top level cell (Level=3 stores the top three levels of hierarchy, ect.)
· HSIM can be run from the command prompt as seen below
· The errors can be viewed using a text editor in hsim.log
· The simulation output, hsim.fsdb, can be viewed using CosmosScope
· See the HSIM manual covering invoking HSIM for additional options
CMOS Circuit Design, Layout, and Simulation
CMOS Mixed-Signal Circuit Design