Digital Integrated Circuit Design - ECE 421L
University of Nevada, Las Vegas
Fall 2023
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Lab 1 | Candence tutorial and general information on editing html lab reports. |
Lab 2 | Designing a 10–bit digital–to–analog converter. |
Lab 3 | Layout of a 10–bit DAC. |
Lab 4 | NMOS and PMOS characteristics and layout with ON C5 Process. |
Lab 5 | Designing a CMOS Inverter. |
Lab 6 | Designing a NAND, XOR, and Full Adder. |
Lab 7 | Designing 8-bit gates and components using buses and arrays. |
Lab 8 | Designing test structures on a chip. |
Lab Project | Design a non-inverting buffer circuit that presents less than 100 fF input capacitance. |