Bryan Callaway's EE 421L Lab Reports

Email: callab2@unlv.nevada.edu

Last edited on 12/1/2020 at 4:27 PM

Welcome to my lab report page! Below you will find reports for the labs that I have completed.

Lab 1 -  Lab Introduction

Lab 2 - Design of a 10-bit DAC

Lab 4 - IV Characteristics and Layout of NMOS and PMOS Devices
Lab 5 - Design, Layout, and Simulation of CMOS Inverter
Lab 6 - Design, Layout, and Simulation of CMOS NAND gate, XOR gate, and Full-Adder
Lab 7 - Using buses and arrays in the design of word inverters, muxes, and high-speed adders
Lab 8 - Generating a Test Chip Layout

Lab Project - High-Speed Digital Receiver
Lecture Project - Control Chip for Flyback SPS

Here's my school Youtube Channel! It's got videos for some projects I've worked on.