Comments and Errata for CMOS
Mixed-Signal Circuit Design 2nd Edition, ISBN-13:
978-0-470-29026-2, ©
2009
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1. In the switched-capacitor
circuits discussed in the MSD book all that sample …
2. Isn’t the KD1S in Fig. 9.4
simply a multi-bit modulator, Sec. 7.3.4?
3. Additional comments on the
use of K-paths (aka N-paths) seen on pages 52 – 53
5. Shouldn’t the
modulation noise in Fig. 8.16 be less than what is seen in Fig. 8.14 adjacent
to the input tone? Yes, see SPICE simulation comments here.
6. What, in simple terms, is
the benefit of the KD1S topology?
8. Would you post
the first edition’s Ch. 36, at the bench? Yes, Ch36_1e_MSD.pdf.
Errata
for the second, and later, printings of the second edition of CMOS MSD:
pages 5-6 – as mentioned on page 4 the cosine signal
leads the sine signal by 90 degrees. This means that the quadrature signal,
with amplitude AQ, in Fig. 1.6
should be drawn pointing down on the y-axis instead of up. The way it’s
currently drawn the sine signal leads the cosine signal. With this correction
the phase shift in Eqs.
(1.10) and (1.11) should be negated (change tan-1 to -tan-1).
page 43 – fifth line from the bottom change “(call
interpolation)” to “(called interpolation)”
page 46 – add a space two lines above Eq. (2.30) so
that “Eq. [2.16]).In” changes to “Eq. [2.16]). In”
page 87 – the gm in Eq. (3.30) should be divided by 2
Errata
for the first printing of CMOS MSD, 2nd Edition (these typos are
fixed in the second and later printings):
page 6 – the I and Q letters in Fig. 1.6 should be
swapped (I on the x-axis and Q on the y-axis)
page 12 – Fig. 1.14b, replace vin(f)
= z^-1*vout(f) with vout(f)
= z^-1*vin(f), in other words swap vin and vout
page 23 – Eq. (1.81) is incorrect. The delay is
already represented in the frequency domain so it doesn’t make sense to take
its Fourier transform. This will be changed to show that the Fourier transform
of a time shifted signal, x(t – t0), has a frequency
spectrum representation of X(f)*exp(-j2*pi*f*t0)
page 26 – Question 1.17, time was not included in the
arguments of the sinusoids. They should read sin(2*pi*f0*t + theta) and cos(2*pi*f0*t + phi)
page 38 – 11th line down change –39.7 to
–39.2
page 42 – Eq. (2.17), [u(t – nTs
– T) – u(t – NTs – Ts)] isn’t h_t(t). h_t(t) is
[u(t – T) – u(t – Ts)] (to fix the typo
remove the label h_t(t) in the first line of the
equation)
page 52 – The left side of Eq. (2.53) should have
magnitude brackets
page 54 – 14th line down change CI to CF
page 58 – in Fig. 2.41 change the CH to CF so that
it matches the derivations, add “–” sign to exponents in Eqs.
(2.73) and (2.74)
page 61 – 5th line down remove “that” and
change “is” to “are”
page 63 – 7th line down change (2.63) to
(2.83)
page 64 – fix spacing in Fig. 2.50 caption
page 65 – 7th line down change
“uncharged” to “discharged”
page 66 – remove the extra space at the end of Table
2.2’s caption
page 71 – Question 2.3, change “returning the output
of the S/H reduces…” to “returning the output of the S/H to zero reduces…” and change 2.2 to 2.4 in Fig. 2.59 caption
page 72 – change CH to CF in question 2.12 to
correspond to the change on page 58 listed above
page 76 – Figure 3.5 caption, replace 35.4 with 3.4
page 87 – Equation 3.30 change –iout-/jwC to +iout-/jwC
(change the sign on iout-)
page 93 – Figure 3.25 caption should refer to Fig.
3.24 not Fig. 5.24
page 115 – swap the outputs of the gm4 transconductor in Fig. 3.53
page 117 – Questions 3.18 and 3.19 change 35.9 and 35.12
to 3.9 and 3.12
page 124 – 12th line down change “extended
and inverted” to “inverted and extended”
page 125 – Figure 4.7, change the last entry under A
from (1) to (+1) and add OF! after the next to the
last entry under Out(A + B), 0010 (+2) OF!
page 126 – Figure 4.8, change the last entry under
Out(A-B) from 0001 (-1) to 0001 (+1) OF!
page 127 – the counter and hold register in Fig. 4.9
should be log2(K) + 1 bits wide not K-bits wide
page 128 – add K in front of the Sinc ratio in the
equation seen in Fig. 4.10 for |H(f)|, see Eq. (4.12), add impulse on the left
in Fig. 4.11b so symmetrical
page 131 – in Fig. 4.14 show the first inverter’s
output as 2-bits and the input to the comb filter is 9 bits
page 136 – change “filer” to “filter” in the caption in
Fig. 4.22
page 137 – in Fig. 4.24 show the first inverter’s
output as 2-bits, 7-bits below the inverter instead of 8, and the input to the
comb filter is 9 bits. Also, in Fig. 4.24 the sign bit only needs to be
extended by 1 on the input of the resonator so a 10-bit DAC is used
page 140 – 4th line from the bottom change
“integrators” to “integrator”
page 143 – 12th line from the top change
“write” to “equate”
page 144 – Figure 4.33 should be modified so that they
have 8 humps between DC and fs
page 158 – bottom two lines, 0.5625 is the result of
cascading two 0.75 multipliers not 0.875 multipliers (change 0.875 to 0.75 in
last line)
page 160 – in question 4.9 replace “Repeat question 4.3
for a…” with “Repeat Ex. 4.3 for a…”
page 164 – Figure 5.2, add a block to the ADC model
showing the S/H used in an ADC, Eq. (2.13), in series with the input. The S/H
response doesn’t come into play in switched-capacitor (discrete-time) circuits
(so it’s removed) since the input signal has already been sampled but it can
influence a continuous-time ADC input signal as discussed in Sec. 2.1.3.
page 170 – Example 5.2 should refer to Fig. 5.13 not
Fig. 5.9.
page 174 – 6th line down change Eq. (5.11) to
Eq. (5.13)
page 178 – last line change “of ideal” to “of the ideal”
page 180 – 4th line from the bottom remove
the extra space between the word “jitter” and the comma
page 188 – near midway down the page change (514) to
(5.14), also remove the square of 0.858 (it’s already power) in root(0.858 +
1.3^2) = 1.6 mV so SNR is 46.9 dB (instead of 47.1 dB)
page 190 – Figure 5.26, the unshaded
rectangle above the shaded rectangle should be made taller so its area matches
the shaded rectangle
page 198 – 14th line from the bottom change
24 dB to 48 dB
page 204 – Figure 6.2, 3rd waveform add a
horizontal line to the right so complete the waveform
page 205 – after Eq. (6.3) add “Note that, in Fig.
6.4b, we are assuming that the S/H response used in the model for an ADC, Fig.
5.2, is 1 ( f << fs).”
Replace, on the 5th line from the bottom line, VQe(0) with NTF(0).
page 207 – replace second paragraph in Ex. 6.1 with
information about the limitations of the comparator in a continuous-time
modulator
page 211 – 3rd line from the top change LSB
to MSB
page 212 – Figure 6.12 square both sides of |H(f)|, Eq.
(6.27) change K3 to K2
page 213 – Equation (6.30) drop the extra VQe
page 219 – Caption for Fig. 6.22 fix spelling of
implementation
page 220 – rewrite last line
page 221 – 5th line change “comparator’s” to
“comparators”
page 222 – in Fig. 6.24 indicate that the added
amplifier also reduces the effects of the comparator’s delay in addition to
comparator offsets
page 239 – 5th line change “Fig. 7.4” to
“Fig. 6.1”
page 255 – 6th line from the bottom change
Fig. 7.51c to Fig. 7.26c
page 260 – Eq. (7.67) change “G1” to “G2”,
4th line from bottom, replace "The block diagram of the..."
with "The implementation of the ..
page 263 – change the last sentence to comment on the
benefit of the topology, an added extra half clock cycle delay for the
comparator to make a decision
page 264 – 5th line above Fig. 7.40 change
“7.39” to “7.32”
page 267 – change “Fig. 7.32 and Eqs.
(7.61) and (7.62)” to “Fig. 7.39 and Eqs.
(7.68) and (7.69)”
page 272 – 6th line from bottom change
"then" to "than"
page 277 – Eq. (7.108) change “v1(z) + v2(z) + v3(z)” to
“v1(z)*z^-1 + v2(z)*(1 – z^-1) + v3(z)*(1 – z^-1)^2”
page 279 – shift Fig. 7.56 up so that it is in between
the two paragraphs, 9th line from the bottom change “v1(z)” to
“o1(z)”, 8th line from the bottom change “o1(z)” to “v1(z)”
page 280 – second line down change y1(t) to v1(t)
page 281 – add additional references. Shift the HW on
the following pages.
pages 287-288 – add
the S/H from the modified Fig. 5.2 (page 164 above) to Fig. 8.2b and include
the S/H response in derivations, Eqs. (8.9) – (8.11),
noting that at f0 it doesn’t
effect Eq. (8.12), add reference to the amplitude modulation from varying
comparator delay discussed on page 207 in Ex. 8.1
page 296 – 2nd line from the bottom change
“Figure 8.15” to “Figure 8.16”
page 314 – 1st sentence should end with a
period not a question mark
page 315 – change the discussion in the second two
paragraphs to focus on the comparator’s delay
pages 316-317 – minor modification to the delay element
in Fig. 9.23 so that there is less non-overlap in the clocks, change the ring
oscillator seen in Fig. 9.24 so that the edges of the clocks are more uniformly
spaced (extremely important, see paper here
and the highlighted text on fourth page).
pages 321-322 – make
minor cosmetic changes
pages 323-324 – add
additional reading. Delete question 9.12 and replace it (and re-number as 9.12)
with the old 9.13
page 325 – add pages 187, 207, 288, and 315 to the index
entry for amplitude modulation
page 327 – add page 315 to the limit cycle oscillations
entry
The
first edition’s supporting material is found in Mixed_Signal_1e.zip
or Mixed_Signal_1e.rar