Labs - ECE 421L Fall 2023

Authored by Homero Olivarez, olivah2@unlv.nevada.edu

8/30/2023 

Lab Index

Lab 1 - Laboratory Introduction

Lab 2 - Design of 10 bit Digital-to-Analog  Converter

Lab 3 - Layout of a 10-bit Digital-to-Analog Converter

Lab 4 - IV characteristics and layout of NMOS and PMOS devices in ON's C5 process

Lab 5 - Design, Layout, and Simulation of a CMOS inverter

Lab 6 - Design, layout, and simulation of a CMOS NAND gate, XOR gate, and Full-Adder

Lab 7 - Using Buses and Arrays in the design of word inverters, muxes, and high-speed adders

Lab 8 - Generating a test chip layout for fabrication

 Project