Lab 7 - ECE 421L Fall 2023

Authored by Homero Olivarez, 

Email:olivah2@unlv.nevada.edu

11/8/2023 

  


Pre-lab:

 The prelab wants us to go through Tutorial 5.

 The first thing to create, is a schematic for a ring oscillator that has 31 inverters in a series. The schematic that we start with in

 the tutorial is not the best looking. This means that we will create a schematic that is better to look at as we can see below.

 

 Pre1

 

 The next step to making the schematic is to make a symbol for the ring oscillator.

Pre2

 

The next step is to create a layout of our 31 inverters that we used in the schematic. Then to DRC check it.

 

Pre3

 

Pre4

 

Now that we got our DRC, We will extract the layout, and then LVS it. When it succeeds the net-lists will match.

 

Pre5

 

Pre6

 

Pre7

 

Next we will make a schematic for simulating our ring oscillator. Once the schematic is made we will simulate it.

 

Pre8

 

Pre9

 Lab:

 The first thing to make within the lab is a 4 bit inverter using arrays. The schematic below is what we make first, then the symbol.

 

lab1

 

lab2.png

 

 Now we will create a schematic of the 4 bit inverter, then create a symbol.

 

lab3

 

lab4

 

Now we will create a schematic for simulating the 4 bit inverter.

 

lab5

 

 Simulation results.

 

lab6

 

The next thing to create is a 8-bit NAND input/output Array

 

 First we create a schematic for the NAND gate and a symbol for the NAND.

 

lab7

 

lab8

 

The next thing is to create a 8-bit NAND schematic, and then a 8-bit NAND symbol.

 

lab9

 

lab10

 

The next thing is to create a schematic for simulating the 8-bit NAND. Then to simulate and see the results.

 

lab29

 

lab27

 

lab28

 

The next thing to make is a 8-bit NOR input/output Array

 

 First create a schematic for the NOR gate. Then create a NOR symbol.

 

lab11

 

lab12

 

Next, create a 8-bit NOR schematic. Then create a 8-bit symbol.

 

lab13

 

lab14

 

Next we will create a schematic for simulating the 8-bit NOR.

 

lab30

 

lab31

 

lab32

 

 The next thing to make is a 8-bit AND input/output Array

 

 The first thing to create is the schematic for the AND gate, then the symbol for the AND gate.

 

lab15

 

lab16

 

 Next, create a schematic for a 8-bit AND and create a 8-bit AND symbol.

 

lab17

 

lab18

  

 Now we will create a 8-bit AND schematic for simulating, and see the results.

 

 lab33

 

lab34

 

lab35

 

The next thing to make is a 8-bit Inverter input/output Array

 

 We will first create a schematic the inverter, and create a symbol for the inverter.

 

lab19

 

lab20

 

 Following this we will create a 8-bit inverter schematic and symbol.

 

lab21

 

lab22

 

Next, we will create a schematic of the 8-bit inverter to simulate, and to see the results.

 

lab36

 

lab37

 

lab38

 

The next thing to make is a 8-bit OR input/output Array

 

 The first thing to make is a schematic for the OR gate. We will use a NOR gate and inverter within the schematic to ge the OR 

gate and create a symbol for the OR gate.

 

lab23

 

lab24

 

 Next, we will create a 8-bit OR schematic, and a 8-bit OR symbol.

 

lab25

 

lab26

 

 Next, we will create a 8-bit OR schematic to simulate, and see the results from the simulation.

 

lab39.png 

 

lab40

 

lab41

 

The next thing to make is a  2 to 1 MUX

 

 First we will create a schematic for the 2 to 1 MUX. Then we will create a symbol for the 2 to 1 MUX.

 

lab42

 

lab43

 

 The next thing is to create a 8-bit MUX scheamtic, and symbol to represent the 8-bit MUX.

 

lab44

 

lab45

 

 Next, we will create a schematic for simulating the 8-bit MUX, and see the results below.

 

lab46

 

 When S is high, the output will follow input A.

 When S is low, the output will then follow input B.

lab47

 

lab48

 

The next thing to make is a 2 to 1 DEMUX

 

 The first thing to do is create a schematic for the 2 to 1 DEMUX. Then create a symbol for the 2 to 1 DEMUX.

 

lab49

 

lab50

 

The next thing to do is create a 8-bit DEMUX schematic. Then create a symbol for that 8-bit 2 to 1 DEMUX.

 

lab51

 

lab52

 

 Next, we will create a schematic of the 2 to 1 DEMUX to see the simulation results.

 

lab53

 

When S is high, the input of Z will be written for the A output.

 

lab54 

 

lab55

 

 When the S is low, the input of Z will written for the B outputs.

 

lab56 

 

lab57

 

Next we will make a Full Adder schematic following the figure 12.20 for the lab. Then we will create a symbol for the Full adder.

 

lab58

 

lab59

 

Next, we will create a 8-bit Full Adder schematic, then create a symbol for this 8-bit Full Adder.

 

lab60

 

lab61

 

 

 The lab files have been backed up.

 

lab62 

 

lab63

 


 


 

 

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