David Nakasone
    EE 421L , Fall 2021
         Lab Reports


Email: nakasd3@unlv.nevada.edu


Lab1      Introduction, installing and using Cadence®   
Lab2      Design of a 10-bit DAC (digital-to-analog converter)   
Lab3      Layout of a 10-bit DAC (digital-to-analog converter)   
Lab4      IV Characteristics of PMOS and NMOS Devices   
Lab5      Design, layout, and simulate a CMOS inverter   
Lab6      Digital integrated circuit design
Lab7      Arrays and buses
Lab8      Layout for fabrication
Project  Register file



Return to >>> EE 421L f21 directory