EE421L - Digital Integrated Circuit Design, Fall 2020 

William Wherry

Email: wherrw1@unlv.nevada.edu

   

Lab 1 – Laboratory introduction, generating/posting html lab reports, installing and using Cadence

     

Lab 2 – Design of a 10–bit digital–to–analog converter (DAC)

     

Lab 3 – Layout of a 10–bit DAC

   

Lab 4 – IV characteristics and layout of NMOS and PMOS devices in ON's C5 process

     

Lab 5 Design, layout, and simulation of a CMOS inverter

     

Lab 6 Design, layout, and simulation of a CMOS NAND gate, XOR gate, and Full–Adder

     

Lab 7  Using buses and arrays in the design of word inverters, muxes, and high–speed adders

     

Lab 8 -  Generating a test chip layout for submission to MOSIS  for fabrication

   

Final Project - High Speed Digital Receiver

    

   

   

Return to EE421L f2020 Student Directory

   

    

Covid-19 Baking Adventures:

   

During the pandemic I have decided to try baking to relax and gain some skills. Below are a couple of my latest creations. I have a pizza addiction, so most of my projects will be pizza and pizza-accessories.

   

Chicago-style Deep Dish Pizza:

   

deep dish

   

Kachapuri (Georgian cheese stuffed bread with egg on top):

   

kachapuri

   

Stromboli:

   

stromb1

stromb 2

   

Home-made cheese crackers (much better than cheese-nips):

   

cheese crackers

cheese crackers2

   

   

My partner in crime:

  

cat1

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