EE 421L page
CMOSedu
| Lab 1 | Monday 24 August 2015 | Laboratory introduction, generating/posting html lab reports |
| Lab 2 | Monday 31 August 2015 | Design of a 10-bit Digital-to-Analog Converter (DAC) |
| Lab 3 | Monday 14 Sept 2015 | Layout of a 10-bit Digital-to-Analog Converter (DAC) |
| Lab 4 | Monday 21 Sept 2015 | IV characteristics and layout of NMOS and PMOS devices in ON's process |
| Lab 5 | Monday 28 Sept 2015 | Design, layout, and simulation of a CMOS inverter |
| Lab 6 | Monday 5 Oct 2015 | Design, layout, and simulation of a CMOS NAND gate, XOR gate, and Full-Adder |
| Lab 7 | Monday 19 Oct 2015 | Using buses and arrays in the design of word inverters, muxes, and high-speed adders |
| Lab 8 | Monday 2 Nov 2015 | Generating a test chip layout for submission to MOSIS for fabrication |
| Final Project |
| EE 421L Student Lab Directory EE 421L page CMOSedu | |
