Lecture notes and videos for EE 421 Digital Electronics and ECG 621 Digital Integrated Circuit Design, Fall 2014

 
December 8 – final exam - Monday, Dec. 8, 1 to 3 PM. (A practice exam is found here.)
December 3 – Lecture 28:
Review for final exam – lec28_ee421_ecg621.pdf and lec28_ee421_ecg621_video    
December 1 – Lecture 27:
14.1 Fundamentals of Dynamic Logic – 14.1.1 Charge Leakage, 14.1.2 Simulating Dynamic Circuits, 14.1.3 Nonoverlapping Clock Generation, and 14.1.4 CMOS TG in Dynamic Circuits – ch14_14_1_video (40:45) and ch14_14_1_notes.pdf         
November 26 – Lecture 26:
13.1 The CMOS TG, 13.2 Applications of the Transmission Gate, 13.3 Latches and Flip-Flops – ch13_13_1_video (63:35) and ch13_13_1_notes.pdf     
November 24 – Lecture 25:
12.4 Complex CMOS Logic Gates – ch12_12_4_video (46:42) and ch12_12_4_notes.pdf  
November 21 – Lecture 24:
12.1 (Static Logic Gates) DC Characteristics of the NAND and NOR Gates, 12.2 Layout of the NAND and NOR Gates, and 12.3 Switching Characteristics – ch12_12_1_video (67:56) and ch12_12_1_notes.pdf     
November 14 – Lecture 23:   
11.4 (Inverter) Sizing for Large Capacitive Loads – ch11_11_4_video (71:22) and ch11_11_4_notes.pdf   
November 12 – Lecture 22:
11.2 (Inverter) Switching Characteristics - ch11_11_2_video (62:28) and ch11_11_2_notes.pdf  
November 5 – Lecture 21:
11.1 (Inverter) DC Characteristics – ch11_11_1_video (58:09) and ch11_11_1_notes.pdf  
October 31 – Lecture 20:  
Discuss course projects – lec20_ee421_ecg621.pdf and lec20_ee421_ecg621_video    
October 29 – Lecture 19:
MOSFET Pass Gate, examples – lec19_ee421_ecg621.pdf and lec19_ee421_ecg621_video
10.1.part2 The Digital MOSFET Model – 10.1.2 Process Characteristic Time Constant, and 10.1.3 Delay and Transition Times and 10.1.4 General Digital Design – ch10_10_1_p2_video (29:54), ch10_10_1_p2_notes.pdf, and ch10_10_1_p2.zip 
10.2 The MOSFET Pass Gate – 10.2.1 Delay through a Pass Gate, 10.2.2 Delay through Series-Connected PGs, and 10.3 A Final Comment Concerning Measurements - ch10_10_2_video (37:31), ch10_10_2_notes.pdf, and ch10_10_2.zip  
October 27 – Lecture 18:
Digital MOSFET Model – lec18_ee421_ecg621.pdf and lec18_ee421_ecg621_video  
10.1.part1 The Digital MOSFET Model – Miller Capacitance, and 10.1.1 Capacitive Effects – ch10_10_1_p1_video (55:59), ch10_10_1_p1_notes.pdf, and ch10_10_1_p1.zip
October 24 – Lecture 17:  
6.4 SPICE Modeling of the MOSFET – 6.4.1 Some SPICE Simulation Examples, 6.4.2 The Subthreshold Current, 6.5 Short-Channel MOSFETs, 6.5.1 MOSFET Scaling, 6.5.2 Short-Channel Effects, 6.5.3 SPICE Models for Our Short-Channel CMOS Process – ch6_6_4_video (69:38) and ch6_6_4_notes.pdf  
October 22 – Lecture 16:
6.3 IV Characteristics of MOSFETs – 6.3.1 MOSFET Operation in the Triode Region, 6.3.2 The Saturation Region – ch6_6_3_video (59:24) and ch6_6_3_notes.pdf      
October 20 – Lecture 15:
6.2 The Threshold Voltage – ch6_6_2_video (69:38) and ch6_6_2_notes.pdf     
October 15 – midterm exam (open book, closed notes)  
October 13 – Lecture 14:
Review for the midterm exam – lec14_ee421_ecg621.pdf and lec14_ee421_ecg621_video   
October 8 – Lecture 13:
6.1 MOSFET Capacitance Overview/Review and MOSFET IV characteristics – ch6_6_1_video (63:35) and ch6_6_1_notes.pdf 
October 6 – Lecture 12:
5.3 MOSFETs and 5.4 Layout Examples – ch5_5_3_video (69:27) and ch5_5_3_notes.pdf 
October 1 – Lecture 11:
5.2 Capacitors and more layout examples – ch5_5_2_video (60:48) and ch5_5_2_notes.pdf   
September 29 – Lecture 10:
4.3 Electrostatic Discharge (ESD) Protection – ch4_4_3_video (23:04) and ch4_4_3_notes.pdf  
5.1  Resistors and 5.2 Capacitors  – ch5_5_1_video (26:48) and ch5_5_1_notes.pdf
September 24 – Lecture 9:
4.2 Connecting Wires to Poly and Active – Layout of MOSFETs – ch4_4_2_video (72:02) and ch4_4_2_notes.pdf     
September 22 – Lecture 8:
4.1 Layout using the Active and Poly Layers – 4.1.1 Process Flow, 4.2 Connecting Wires to Poly and Active – ch4_4_1_video (64:05) and ch4_4_1_notes.pdf     
September 17 – Lecture 7:
3.2 Design and Layout Using the Metal Layers, 3.2.3 Current-Carrying Limitations, 3.2.4 Design Rules for the Metal Layers, 3.2.5 Contact Resistance, 3.3 Crosstalk and Ground Bounce, 3.2.1 Crosstalk, 3.2.2 Ground Bounce – ch3_3_2_video (70:17) and ch3_3_2_notes.pdf
September 15 – Lecture 6:
3.1 The Bonding Pad – 3.1.1 Laying Out the Pad I, 3.2 Design and Layout Using the Metal Layers, 3.2.1 Metal 1 and Via1, 3.2.2 Parasitics Associated with the Metal Layers – ch3_3_1_video (59:45) and ch3_3_1_notes.pdf
September 10 – Lecture 5:
2.4.3 Storage or Diffusion Capacitance and work examples from Ch. 2 – ch2_2_4_3_video (62:25) and ch2_2_4_3_notes.pdf   
September 8 – Lecture 4:
2.4 The N-well/Substrate Diode – 2.4.1 A Brief Introduction to PN Junction Physics, 2.4.2 Depletion Layer Capacitance, 2.4.4 SPICE Modeling, and 2.5 The RC Delay through an N-well – ch2_2_4_video (63:58) and ch2_2_4_notes.pdf   
September 3 – Lecture 3:
2.1 Patterning - 2.1.1 Patterning the N-well, 2.2 Laying Out the N-well – 2.2.1 Design Rules for the N-well, 2.3 Resistance Calculation - 2.3.1 The N-well Resistor - ch2_2_1_video (58:52) and ch2_2_1_notes.pdf  
August 27 – Lecture 2:
More discussion on setting up the Cadence tools – lec2_ee421_ecg621_video 
August 25 – Lecture 1:
Course introduction, CMOS IC design, using the Cadence examples from the book – lec1_ee421_ecg621.pdf and lec1_ee421_ecg621_video 
 

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