Shadden
Abdalla
Contact: shadden.abdalla@unlv.edu
I graduated from UNLV with a BS in Electrical Engineering in
May of 2020. I worked as an undergraduate research assistant for Dr. Baker from December 2016 until I graduated in
May 2020.
I have held a variety of long-term leadership positions during
my undergraduate career. I served as a member of UNLV CSUN Student Government
on the board of the attorney general (1 semester), as an elected Senator for 2
terms (2 years), the chair of the Scholarships and Grants Committee (1 year),
as a leader of the College of Engineering STEM Leadership Committee (1 year),
and have served as the Chair/President of the UNLV IEEE Student Chapter (2
years).
Memory Circuit Design Course (ECG 721)
Project, May 2020
·
Memristor Operation & Applications Presentation
Radio
Frequency Projects in the Cadence Virtuoso – TowerJazz SBC18 0.18um SiGe BiCMOS
Process:
Additional
Layout in the Cadence Virtuoso – TowerJazz SBC18 0.18um SiGe BiCMOS Process:
·
Circuit
Layouts Made for Freedom Photonics
Paper
Presented at the GLSVLSI 2019 ACM Great Lakes Symposium May 9-11, 2019
· Monolithic
8x8 SiPM with 4-bit Current-Mode Flash ADC with
Tunable Dynamic Range
Analog
Design Projects:
· Cadence Virtuoso Low Voltage Op-Amp
Layout
· Low
Voltage Op-Amp Design
· Voltage
Amplifier Design
· Analog
Integrated Circuit Design Labs using LTSpice
Cadence
Virtuoso Projects in the On
Semiconductor 500
nm, the C5 CMOS process with two polysilicon layers and 3 levels of metal:
· Serial
to Parallel Converter: Schematics, Simulations, and Layout
·
Boost
SPS Report: Schematics, Layout, Calculations.
·
Digital
Integrated Circuit Design Labs
Printed
Circuit Boards:
PCBs are used to test chips that we fabricate using Cadence
Virtuoso in our research lab. We glue the chip onto a package, wire-bond the
chip to the package, solder it onto the PCB, solder on the other parts, and
test the chips. The PCBs are named by the chip designers and are all song
names. More information about the chips can be found on the chip designer’s
webpages.
Below are some of the PCBs that I have designed in the lab
using Eagle or
Diptrace:
·
Navy ADC
·
Dynamic
Comparator Individual Circuit for “Solar Sailor” chip (Avalanche
Photodiodes and Silicon Photo Multipliers)
·
“Thriller”
Radiation Test PCBs for APD Test Chip (SIGE APDs Fabricated in a BiCMOS
Process)
·
“Solar
Sailor” PCBs (Avalanche Photodiodes and Silicon Photo Multipliers)
·
“Frank
Sinatra” PCBs (TIA Test Chip with Various Test Structures)
·
Flex PCBs
for UNLV ASML Lab. These PCBs were used to test smart fibers in a mechanical
engineering lab here at UNLV.
·
“Starboy”
PCBs (SIGE APDs Fabricated in a BiCMOS Process)
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