ECE 421L
Digital Electronics Lab
Manuel C. Degracia Jr., Fall 2016
Project
Lab8
Lab7
Lab6 - Design, layout, and sim a NAND Gate, XOR Gate, & Full-Adder
Lab5 - Design, layout, and simulation of a CMOS inverter
Lab4 - IV Characteristics and layout of NMOS and PMOS devices in ON's C5 process
Lab3 - Layout of a 10-bit DAC
Lab2 - Design of a 10-bit digital-to-analog converter (DAC)
Lab1 - Laboratory introdution
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Fall 2015 webpage