EE 420L Analog Integrated Circuit Design Laboratory
Spring 2015, University
of Nevada, Las
lab reports are found here.
grades are located here.
Project – using
as many diodes, resistors, and capacitors as needed, along
with CD4007 chips from the same production lot (see date code on
the top of
chip) to ensure current mirrors are possible, design and build a
bandgap voltage reference (BGR). Your report, in html, should detail
your design considerations, simulation results (using the models you
generated in lab 8), and measured results showing the BGR's performance (how the reference voltage changes with VDD). It
would be good, but it's not required, if you could also characterize
the BGR performance with temperature. Your report is due at the end of lab on Friday, May 8. Access to your CMOSedu.com accounts will be removed at this time.
April 17 – Lab9 – Design of a Beta–Multiplier Reference (BMR) using the CD4007 CMOS transistor array, due April 24 April 10 – Lab8 – Characterization of the CD4007 CMOS transistor array, due April 17
March 20 – Lab7 – Design of an audio amplifier, due April 10 March 6 – Lab6 – Single–stage transistor amplifiers, due March 20
February 27 – Lab5 – Op–amps III, the op–amp integrator, due March 6
February 20 – Lab4 – Op–amps II, gain–bandwidth product and slewing, due February 27February 6 – Lab3 – Op–amps I, basic topologies, finite gain, and offset, due February 20 January 30 – Lab2 – Operation of a compensated scope probe, due February 6
January 23 – Lab1 – Review of basic RC
circuits, due January 30
Instructor: R. Jacob Baker
Lab Assistant: Yiyan Li
Time: Friday from 8:30
AM to 11:15 AM
dates: Friday, January 23
to Friday, May 8
Location: TBE B–311
Holiday: April 3 (Spring break)
Course content – Applications
and study of modern electronic analog and digital circuits. Advanced
Corequisite: EE 420;
Prerequisite: EE 320L
40% Lab Reports
the lectures, laptops can be used during the lab. Please bring your laptop with you
a quiz is open book then only the course textbook can be used (no
Kindle, Nook, etc., older/international editions, or photocopies).
late work accepted. Regularly
being tardy for labs, leaving in the middle of labs, or leaving early
is unacceptable without consent of the instructor.
or plagiarism will result in an automatic F grade in the lab
for the instructor (only) should be asked in person (not via email).