EE 420L Engineering Electronics II Lab - Lab 8
Characterization of the CD4007 CMOS transistor array

 

Pre-lab work

 

In this lab you will characterize the transistors in the CD4007 and generate SPICE Level=1 models. Assume that the MOSFETs will be used in the design of circuits powered by a single +5 V power supply. In other words, don't characterize the devices at higher than +5 V voltages or lower than ground potential.
    1. ID v. VGS (0 < VGS < 3 V) with VDS = 3 V 
    2. ID v. VDS (0 < VDS < 5 V) for VGS varying from 1 to 5 V in 1 V steps, and 
    3. ID v. VGS (0 < VGS < 5 V) with VDS = 5 V for VSB varying from 0 to 3 V in 1 V steps. 

Ensure that your html lab report includes your name, the date, and your email address at the beginning of the report (the top of the webpage).
When finished backup your work.