EE 420L Engineering Electronics II Lab - Lab 9
Design of a
Beta-Multiplier Reference (BMR) using the CD4007 CMOS transistor array
Pre-lab work
- This lab will
use the level=1 MOSFET model created in lab 8 and, again, the MOSFETs in the CD4007.pdf CMOS transistor array.
- Design and
simulate the operation of a BMR that biases the NMOS devices so that they
have a gm of 20 uA/V
- Use
a simple (big) resistor to VDD for the start-up circuit (explain how the
addition of a resistor ensures start-up).
- When
the BMR is operating the current in the big resistor should be much
smaller than the current flowing in each branch of the BMR
- Write-up,
similar to a homework assignment, your design calculations and simulation
results. (This will count as the pre-lab quiz.)
- Ensure that you
show the following in what you turn in:
- Hand
calculations
- Operation
as VDD is swept from 0 to 10 V
- Vbiasn
should stabilize (be constant) after VDD hits a minimum value (estimate
this value of VDD assuming VGS/VSG is a threshold voltage and VDS,sat/VSD,sat is zero).
- Vbiasp
should follow VDD after VDD hits a minimum value (show this in
simulations)
- Unstable
operation if too much capacitance is shunting the BMR's resistor (see bottom of page 630)
- Comments
comparing the hand calculations with the simulation results
In this lab you may need to use two, or more, CD4007 chips from the same production lot (see
date code on the top of chip) to ensure using a BMR to bias a current mirror is
possible. If the CD4007 chips are not from the same production lot they will
not "match" so current mirrors will not be possible.
- Build your BMR
design and characterize it as you did in the pre-lab
- You
expect the BMR to become unstable if there is a large capacitance
across the resistor, such as a scope probe (important), so care must be
exercised
- Use your BMR to
bias, and thus create, a:
- NMOS
current mirror
- PMOS
current mirror
- Measure how the
current varies through each current mirror as the voltage across the
mirror changes.
- Of
course the current in the NMOS (PMOS) current mirror goes to zero as the
voltage on the drain of the output device moves towards ground (VDD)
- Using these current mirrors drive two gate-drain connected transistors
- For the first experiment use the NMOS current mirror to drive two PMOS gate-drain connected devices.
- Use
the voltages on the gate-drain connection of the two devices to bias a
cascode current mirror (characterize this mirror as before)
- For the second experiment switch, that is, use the PMOS current mirror to drive two NMOS gate-drain connected devices.
- Again, use these two voltages to bias an NMOS cascode current mirror then characterize.
Ensure
that your html lab report includes your name, the date, and your email
address at the beginning of the report (the top of the webpage).
When
finished backup your work.