EE 421L Digital Integrated Circuit Design Laboratory
Fall 2017, University of Nevada, Las Vegas

 

Student lab reports are found here.

  

Current grades are located here.

   
August 30 - Lab1 - Laboratory introduction, generating/posting html lab reports, installing and using Cadence, due September 6   
   

Instructor: R. Jacob Baker (see office hours at this link)

Lab Assistant: TBA
Time: Wednesday from 11:30 to 2:15 PM

Course dates: Wednesday, August 30 to Wednesday, December 6

Location: TBE B-350

Holidays: none

Course content Laboratory based analysis and design of digital and computer electronic systems.

Credits: 1

Corequisite: EE 421; Prerequisite: EE 320L

 

Grading
30% Quizzes
40% Lab Reports

30% Project
 

Policies 

  • Unlike the lectures, laptops can be used during the lab. Please bring your laptop with you to lab!
  • If a quiz is open book then only the course textbook can be used (no ebooks, Kindle, Nook, etc., older/international editions, or photocopies).
  • No late work accepted. Regularly being tardy for labs, leaving in the middle of labs, or leaving early is unacceptable without consent of the instructor.
  • Cheating or plagiarism will result in an automatic F grade in the lab
  • Questions for the instructor (only) should be asked in person (not via email).
  

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