Lab 8_Mosis Chip 1 - ECE 421L 

Authored by Jared Hayes 

hayesj18@unlv.nevada.edu 

November 30, 2015

Members:

• Jared Hayes
• Shada Sharif
• Juan Buendia
• Stephanie Silic

Description:

Design layouts, schematics, symbols, and simulations of the following in preparation for implementation on a chip:
 
  1) a 25k resistor using the n-well (connect between 2 pads but we also need a common gnd pad) 

  9) 8-bit resettable (with clear) up/down counter (with buffered outputs)
  

Pre-lab

Make sure you understand all of the Cadence tutorials on CMOSedu here.

Lab Report:

Padframe

• The padframe uses analog pads with ESD protection.
• VDD for the chip should be connected to pin 40 and global GND should be connected to pin 20.
• VDD and GND are shared between all of the components.

   

 



  

 
Testing Instructions:

For all the parts bellow pin<20>  should always be connected to ground and pin<40>  should always be connected to vdd.

• UP/DOWN 8-bit Counter
• The first thing to do before using the counter is to connect pin<8> to an external vdd so that the counter is powered.
• Our counter is able to count UP/DOWN depending in the UP_in, which is pin<9> signal provided, when UP_in is high the counter counts up, and when UP_in is low the counter counts down. 
• For the counting to start happening user should input a clock signal to pin<10> that is CLK. Looking at Project report user can understand how the counter functions.
• The CLEAR input is pin<11> and when it is high the output is cleared to 0, and when it is low the counter works as normal. 
• As for the 8 bit outputs we have 
• S<0> is from pin<15>
• S<1> is from pin<14>
• S<2> is from pin<13>
• S<3> is from pin<12>
• S<4> is from pin<7>
• S<5> is from pin<6>
• S<6> is from pin<5>
• S<7> is from pin<4>
• 31-Stage Ring Oscillator
• To power the ring oscillator connect vdd to a power supply and that is pin<24>.
• The output of the oscillator can be observed from pin<25>.
• The output of the oscillator has already been buffered on-chip so that the oscillator can handle a 20 pF off-chip load.
• The testing of the oscillator driving the 20 pF load can also be seen in Project report.
• NAND and NOR gates
• NAND and NOR gates share the same input pins that will be noted below.
• NAND
• To power the NAND gate connect pin<31> to a power supply.
• Input A is pin<28> and input B is pin<29>. 
• To measure the output use pin<30>.
• NOR
• To power the NOR gate connect pin<33> to a power supply. 
• Inputs A and B are again pin<28> and pin<29> respectively.
• The output is measured from pin<32>.
• Sample simulations for the nand and nor gates can be found in Project report, showing different inputs and the corresponding outputs. 

• Inverter
• To power the inverter's vdd connect pin<35> to a power supply.
• The input of the inverter is shared again from pin<29> that was used for the NAND and NOR gates.
• The output is measured from pin<34>.
• PMOS and NMOS
• PMOS
• The gate of the PMOS is connected to pin<17>.
• The source of the PMOS is connected to pin<16>.
• The drain of the PMOS is connected to pin<18>.
• The body of the PMOS is connected to pin<19>.
• In order to avoid body effects of the PMOS the body should be connected to vdd from the power supply. Otherwise, the characteristics of the PMOS will vary like the Vth voltage.
• NMOS
• The gate of the NMOS is connected to pin<23>.
• The source of the NMOS is connected to pin<22>.
• The drain of the NMOS is connected to pin<21>.
• The body of the NMOS is connected to pin<20> that is the ground pin, which should be connected to ground as instructed above before starting to test anything.
• Voltage divider, and resistors
• 25K resistor
• In order to test the 25k resistor connect one end of the multimeter to pin<36> and the other end to pin<37>. 
• Make sure ground pin<20> is connected to ground.
• 10K resistor
• Connect one end of the multimeter to pin<37> again and the other end to the ground pin<20>.
• Voltage divider
• Connecting pin<20> to ground.
• The input signal should be from pin<36>, and to measure the output connect the positive end of the multimeter or the scope to pin<37>  and the other end to the ground pin pin<20>.
• In the Project report a 5V signal was tested and the output was 1.43V.

 
 
 
The project materials are backed up to my dropbox folder.
 

 
 
The cadence files can be found here: Mosis Chip 1
 
 
 
 
 
 

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