EE 420 Engineering Electronics II and ECG 620 Analog IC Design
Spring 2020, University of Nevada, Las Vegas

 

Course lecture notes and videos are located here

Homework assignments, due dates, and project information are located here

 

Current grades are located here.

 

In this course we will make extensive use of LTspice.

Examples from the lectures are found in ee420_ecg620_s20.zip.

 

Textbook: CMOS Circuit Design, Layout, and Simulation, Fourth Edition (Chapters 9, 20-24)

Instructor: R. Jacob Baker (see office hours at this link)

Teaching Assistant (grader): Sachin Namboodiri     

Time: MW 4:00-5:15 PM

Course datesWednesday, January 22 to Wednesday, May 6

Location: SEB 1242  

HolidaysMonday, February 17 (President's Day Recess), March 16 and 18 (Spring break from instruction)    
Final exam timeMonday, May 11 from 6 - 8 PM, cumulative, open book and closed notes  

Course contentAn introduction to the design, layout, and simulation of analog integrated circuits including current mirrors, voltage and current references, amplifiers, and op-amps. Credits: 3

Prerequisites: EE 320

 

Grading
25% Midterm
25% Homework/Quizzes

25% Course Project (more complicated project for graduate credit, that is, ECG 620)
25% Final

 

Policies

  • No laptops, Internet appliances (e.g. smart phones) can be used during lectures or exams.
  • No late work accepted. If you can't make lecture (for whatever reason) then email a PDF of your hw to the TA for grading before the start of the lecture (if the grader receives after start of lecture then your hw won't be graded). Of course you can also always give your hw to another student to turn in for you too.
  • If an exam or quiz is open book then only the course textbook can be used (no electronic copies, older/international editions, or photocopies).
  • The final exam will not be returned at the end of the semester, not even temporarily for you to review.
  • Cheating or plagiarism will result in an automatic F grade in the course (so do your own work!)

 

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