EE 420 Engineering Electronics II and ECG 620 Analog IC Design
Spring 2019, University of Nevada, Las Vegas

 

Course lecture notes and videos are located here

Homework assignments, due dates, and project information are located here

 

Current grades are located here.

 

In this course we will make extensive use of LTspice.

Examples from the lectures are found in ee420_ecg620_s19.zip.

 

Textbook: CMOS Circuit Design, Layout, and Simulation, Third Edition (Chapters 9, 20-24)

Instructor: R. Jacob Baker (see office hours at this link)

Teaching Assistant: Sachin Namboodiri   

Time: MW 4:00-5:15 PM

Course datesWednesday, January 23 to Wednesday, May 8

Location: SEB 1242 

HolidaysMonday, February 18 (President's Day Recess), March 18 and 20 (Spring break from instruction)    
Final exam timeMonday, May 13 from 6 - 8 PM, cumulative, open book and closed notes  

Course contentAn introduction to the design, layout, and simulation of analog integrated circuits including current mirrors, voltage and current references, amplifiers, and op-amps. Credits: 3

Prerequisites: EE 320

 

Grading
25% Midterm
25% Homework/Quizzes

25% Course Project (more complicated project for graduate credit, that is, ECG 620)
25% Final

 

Policies

  • No laptops, Internet appliances (e.g. smart phones) can be used during lectures or exams.
  • If an exam or quiz is open book then only the course textbook can be used (no electronic copies, older/international editions, or photocopies).
  • The final exam will not be returned at the end of the semester, not even temporarily for you to review.
  • Cheating or plagiarism will result in an automatic F grade in the course (so do your own homework and projects!)
  • Questions for the instructor (only) should be asked in person (not via email). Please talk to the instructor. Please don't email the instructor.

 

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