Below are the schematic and layout of a preamp designed and laid out by Jake Baker in 1999 for a power line communications chip designed by ITRAN communications. The process used is Tower Semiconductors 0.35 um process. The gain of the pre-amp was set to 23 dB. The output clipping was accomplished using the source follower and the diode connected load (in series with a current sink.) The layout shown below also shows the op-amp used to drive an off-chip low impedance filter.

http://cmosedu.com/jbaker/projects/preamp99.gif

http://cmosedu.com/jbaker/projects/preamp_lay99.gif

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