EE 421 Digital Electronics and ECG 621 Digital Integrated Circuit Design
Fall 2014, University of Nevada, Las Vegas

 

Course lecture notes and videos are located here

Homework assignments, due dates, and project information are located here

 

Current grades are located here.

 

For the fabrication of chips in this class, On Semiconductor 500 nm, the C5 CMOS process with two polysilicon layers and 3 levels of metal.

The MOSIS scalable CMOS (SCMOS) are found in submicron design rules.

A MOSIS technology code of SCN3ME_SUBM with a lambda of 300 nm is used with the design rules.

MOSIS information for this process is located here and the SPICE models are C5_models.txt    

The Cadence examples from the lectures are found in C5_f14.zip (upload to, and unzip in, $HOME/CMOSedu)  

Don't forget to add, to your cds.lib, DEFINE C5_f14 $HOME/CMOSedu/C5_f14 so the Library Manager sees the design directory

  

Textbook: CMOS Circuit Design, Layout, and Simulation, Third Edition (Chapters 1-6, 10-15)

Instructor: R. Jacob Baker (see office hours at this link)
Teaching Assistant: Wenlan Wu (see office hours at this link)

Time: MW 1:00 to 2:15 PM

Course dates: Monday, August 25 to Wednesday, December 3

Location: SEB 1240

Holidays: Monday, September 1 (Labor Day Recess) 
Final exam time: Monday, Dec. 8, 1 to 3 PM

Course content – An introduction to the design, layout, and simulation of digital integrated circuits. MOSFET operation and parasitics. Digital design fundamentals including the design of digital logic blocks. Credits: 3

Prerequisites: CpE 100 and EE 320

 

Grading
25% Midterm
25% Homework/Quizzes

25% Course Project (more complicated project for graduate credit, that is, ECG 621)
25% Final

 

Policies

  • No laptops, Internet appliances (e.g. Kindle, Nook, Ipad, etc.), smart phones, can be used during lectures or exams.
  • If an exam or quiz is open book then only the course textbook can be used (no ebooks, Kindle, Nook, etc., older/international editions, or photocopies).
  • No late work accepted. All assigned work is due at the beginning of class.
  • The final exam will not be returned at the end of the semester, not even temporarily for you to review.
  • Regularly being tardy for lectures, leaving in the middle of lectures, or earlier from lectures is unacceptable without prior consent of the instructor.
  • Cheating or plagiarism will result in an automatic F grade in the course (so do your own homework and projects!)
  • Questions for the instructor (only) should be asked in person (not via email).

 

Course Outcomes 

After completing EE 421/ECG 621 students will be able to:

1.

List the main layers used in the fabrication of a digital integrated circuit. Program Outcomes: 1.3, 1.4, 1.6, 1.7, 1.8, 1.9, and 1.10.
2.

Sketch the cross-sectional view of a layout. Program Outcomes: 1.6, 1.8, 1.9, 1.10, and 1.11.
3.

Discuss the movement of electrons and holes in pn-junctions and transistors under various operating conditions. Program Outcomes: 1.1, 1.2, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11.
4.

Calculate delays through semiconductor materials and conducting wires. Program Outcomes: 1.1, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11.
5.

Describe the operation of MOSFETs using equations and intuitively. Program Outcomes: 1.1, 1.2, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11.
6.

Design, estimate delays, and determine speed bottlenecks in digital circuits. Program Outcomes: 1.1, 1.3, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11.
7.

Layout digital circuits and chips. Program Outcomes: 1.3, 1.4, 1.6, 1.7, 1.8, 1.9, 1.10, and 1.11.

 

Program Outcomes 

1.1

An ability to apply mathematics through differential and integral calculus.
1.2

An ability to apply advanced mathematics such as differential equations, linear algebra, complex variables, and discrete mathematics.
1.3

An ability to apply knowledge of basic sciences.
1.4

An ability to apply knowledge of computer science.
1.6

An ability to apply knowledge of engineering.
1.7

An ability to design a system, component, or process to meet desired needs within realistic constraints.
1.8

An ability to identify, formulate, and solve engineering problems.
1.9

An ability to analyze and design complex electrical and electronic devices.
1.10

An ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.
1.11

An ability to design and conduct experiments, as well as to analyze and interpret data.

   

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