Digital
to Analog Converter
Designed and
laid out in 1997 by Jake Baker for Tower Semiconductor
The cell pictured above is a
folder resistor implementation of an 8-bit Digital to Analog Converter for use
in a high speed modem.
The cell is full custom layout
that contains in excess of 1200 transistors.
Design Specifications:
- Frequency response of output: 1MHz
- Clock frequency of input: 4MHz
- Output voltage range: 0.6V - VDD-0.6V or 12% - 88% of VDD
- Linearity: 0.5 LSB
- Gain error: +/- 5%
- IDD < 1.2mA
- Output glitches < 0.5 LSB
- Output resistance < 50 ohm
The cell was
designed using a 0.6 micron, double metal, single poly process.