Lab 3 - ECE 421L 

Authored by Staford Snow, snows4@unlv.nevada.edu

09/19/2916

Lab description: In this lab, I used multiple 10k n-well resistor we made in Tutorial 1 in to a layout of the DAC from lab 2.

Prelab:

Following the prelab instructions here, I backup my previous lab work and completed Tutorial 1.

Lab:

In Tutorial 1, we designed the layout of a 10k n-well resistor.

To decide the width and length of the n-well, I used the formula, R = ρ/t * L/W.  Where ρ/t = 800 Ω/▪.  To get a R of 10k, L/W needs to equal 12.5▪.  To stay on the .15 micron grid, I set L to 56.25 and W to 4.5.  This gives me a L/W of 12.5▪.  I end up with a R of 10.24k.

I looked at the schematic of my DAC from the previous lab.

Using this schematic and the n-well resistor, I constructed a layout of my DAC.

I completed the layout and verified everything by running the DRC.  The design passed.

After passing the DRC, I extracted the design.

With the DRC passed and the extraction completed, I ran LVS to verify against my schematic.  This passed as well.

This completed the objective of the lab.

I have zipped the design files for the lab, the zipped folder can be located here.

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