EE 420L Analog Integrated Circuit Design Laboratory
Spring 2016, University
of Nevada, Las
lab reports are found here.
grades are located here.
Project – design a transimpedance amplifier (TIA) using either the ZVN3306A or ZVP3306A (or both) MOSFETs and as many resistors and capacitors as you need with a gain of 30k.
You should try to get as fast a design as possible driving a 10k load
with as large of output swing as possible. AC coupling input and output
is okay as long as your design can pass a 100 Hz input current. Your
report, in html, should detail your design considerations, and measured results showing the TIA's performance. Your report is due at the end of lab on Wednesday, May 4. Access to your CMOSedu.com accounts will be removed at this time.
April 13 – Lab9 – Design of a Beta–Multiplier Reference (BMR) using the CD4007 CMOS transistor array, due April 20
April 6 – Lab8 – Characterization of the CD4007 CMOS transistor array, due April 13
March 30 – Lab7 – Design of an audio amplifier, due April 6
March 9 – Lab6 – Single–stage transistor amplifiers, due March 30
March 2 – Lab5 – Op–amps III, the op–amp integrator, due March 9
February 24 – Lab4 – Op–amps II, gain–bandwidth product and slewing, due March 2
February 10 – Lab3 – Op–amps I, basic topologies, finite gain, and offset, due February 24 February 3 – Lab2 – Operation of a compensated scope probe, due February 10 January 20 – Lab1 – Lab safety review and then review of basic RC
circuits, due February 3
Instructor: R. Jacob Baker
Lab Teaching Assistant: Yiyan Li
Time: Wednesday from 10:00
AM to 12:45 AM
dates: Wednesday, January 20
to Wednesday, May 4
Location: TBE B–350
Holiday: March 23 (Spring break)
Course content – Applications
and study of modern electronic analog and digital circuits. Advanced
Corequisite: EE 420;
Prerequisite: EE 320L
40% Lab Reports
the lectures, laptops can be used during the lab. Please bring your laptop with you
a quiz is open book then only the course textbook can be used (no
Kindle, Nook, etc., older/international editions, or photocopies).
late work accepted. Regularly
being tardy for labs, leaving in the middle of labs, or leaving early
is unacceptable without consent of the instructor.
or plagiarism will result in an automatic F grade in the lab
for the instructor (only) should be asked in person (not via email).