EE 420L Engineering
Electronics II Lab
Spring 2014, University
of Nevada, Las
lab reports are found here.
grades are located here.
Project – using as
many resistors and capacitors as needed, along with two CD4007 chips
from the same production lot (see date code on the top of chip) to
ensure current mirrors are possible, design and build a general purpose
op–amp. Your report, in html, should detail your design considerations,
simulation results (using the models you generated in lab 8), and
measured results showing the op–amp performance in various gain
configurations and loads. Your report is due at the end of lab on Monday, May 5. Access to your CMOSedu.com accounts will be removed at this time.
April 21 – Lab8 – Characterization of the CD4007 CMOS transistor array
April 14 – Lab7 – Design of an audio amplifier
March 31 – Lab6 – Single–stage transistor amplifiers
March 24 – Lab5 – Op–amps III, the op–amp integrator
March 3 – Lab4 – Op–amps II, gain–bandwidth product and slewing
February 24 – Lab3 – Op–amps I, basic
topologies, finite gain, and offset
February 10 – Lab2 – Operation of a compensated
January 27 – Lab1 – Review of basic RC
Instructor: R. Jacob Baker
Lab Assistant: Wenlan
Time: Monday from 11:30
AM to 2:15 PM
dates: Monday, January 27
to Monday, May 5
Location: TBE B–311
Holidays: February 17
(Washington's Birthday Recess)
17 (Spring break)
Course content – Applications
and study of modern electronic analog and digital circuits. Advanced
Corequisite: EE 420;
Prerequisite: EE 320L
40% Lab Reports
the lectures, laptops can be used during the lab. Please bring your laptop with you
a quiz is open book then only the course textbook can be used (no
Kindle, Nook, etc., older/international editions, or photocopies).
late work accepted. Regularly
being tardy for labs, leaving in the middle of labs, or leaving early
is unacceptable without consent of the instructor.
or plagiarism will result in an automatic F grade in the lab
for the instructor (only) should be asked in person (not via email).