ECG 720 Advanced Analog IC Design
Fall 2017, University of Nevada, Las Vegas

 

Course lecture notes and videos are located here

Homework assignments, due dates, and project information are located here

 

Current grades are located here.

 

Textbook: CMOS Circuit Design, Layout, and Simulation, Third Edition (Chapters 8, 25–31)

Instructor: R. Jacob Baker (see office hours at this link)  

Teaching Assistant: Shada Sharif  

Time: offered as an online course to on–campus UNLV students

Course dates: Monday, August 28 to Wednesday, December 6

Location: offered as an online course to on–campus UNLV students

Holidays: Monday, September 4 (Labor Day Recess)   
Final exam time: Monday, December 11, 6 to 8 PM  

Course content – Advanced analog design considerations including: noise, common–mode feedback, high–speed design, and design for analog signal processing. Credits: 3

Prerequisites: EE 420 or ECG 620

 

Grading
25% Midterm
25% Homework

25% Course Project
25% Final

 

Policies

  • No laptops, Internet appliances (e.g. Kindle, Nook, Ipad, etc.), smart phones, can be used during lectures or exams.
  • If an exam or quiz is open book then only the course textbook can be used (no ebooks, Kindle, Nook, etc., older/international editions, or photocopies).
  • No late work accepted. All assigned work is due at the beginning of class.
  • The final exam will not be returned at the end of the semester, not even temporarily for you to review.
  • Regularly being tardy for lectures, leaving in the middle of lectures, or earlier from lectures is unacceptable without prior consent of the instructor.
  • Cheating or plagiarism will result in an automatic F grade in the course (so do your own homework and projects!)
  • Questions for the instructor (only) should be asked in person (not via email).

 

Course Outcomes 

After completing ECG 720 students will be able to: 

1.

Analyze and calculate noise in a passive and active electronic circuit.
2.

Suggest, and simulate to verify, ways to improve the noise performance of a circuit.
3.

Design very–high speed op–amps for use in analog signal processing and data converter design.
4.

Design clocked and non–clocked comparators with and without offset storage.
5.

Simulate, and discuss the limitations, of advanced analog circuits and systems including: op–amps, comparators, digital–to–analog converters, and analog–to–digital converters.
6.

Discuss the design (speed, accuracy, layout size, power, etc.) trade–offs between different data converter topologies.
7.

Implement and layout analog–to–digital and digital–to–analog converters.
  

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