CpE 100 Computer Logic Design I
Spring 2021, University of Nevada, Las Vegas

   

Course lecture notes and videos are located here

Homework assignments and due dates are located here

 

Current grades are located here.

 

In this course we will make extensive use of LTspice.

Examples from the lectures are found in cpe100_s21.zip.    

   

Textbook (required): Digital Design and Computer Architecture 2nd Edition by David Harris and Sarah Harris     

Instructor: R. Jacob Baker (see office hours at this link) 

Teaching Assistant (grader): James Skelly (Office Hours: TBA, email to get access)          

Time: MW 4:00 to 5:15 PM

Course dates: Wednesday, January 20 to Wednesday, May 5

Location: TBE B-174 and TBE B-176 (two classrooms simultaneously)  

Holidays: Monday, February 15 (President's Day Recess), March 15 and 17 (Spring break from instruction)  
Final exam time: Monday, May 10 from 6 PM - 8 PM

Course content – Digital design concepts and fundamentals. Combinational circuits. MSI and LSI circuits. Sequential machine fundamentals. Sequential circuit analysis and design. Modern developments. Credits: 3

Prerequisites: MATH 126 and MATH 127 or MATH 128.

 

Grading
25% Homework
25% Quizzes

25% Midterm

25% Final

 

Policies

  • No late work accepted. If you can't make lecture (for whatever reason) then email a PDF of your hw to the TA for grading before the start of the lecture (if the grader receives after start of lecture then your hw won't be graded). Of course you can also always give your hw to another student to turn in for you too. 
  • The final exam will not be returned at the end of the semester, not even temporarily for you to review.
  • Cheating or plagiarism will result in an automatic F grade in the course (so do your own work!)
  • Electronic devices may not be used during an exam or quiz so a hardcopy of the book is required.

  

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