EE
421L Digital Integrated Circuit Design - Lab 6
Design,
layout, and simulation of a CMOS NAND gate, XOR gate, and Full-Adder
Pre-lab
work
- Back-up all of your
work from the lab and the course.
- Go through Cadence Tutorial
4
seen here.
- Read through the lab in its entirety before starting to work on it
- Draft
the schematics of a 2-input NAND gate (Fig. 12.1), and a 2-input XOR
gate (Fig. 12.18) using 6u/0.6u MOSFETs (both NMOS and PMOS)
- Create layout and symbol
views for these gates showing that the cells DRC and LVS
without errors
- ensure that your symbol
views are the commonly used symbols (not boxes!) for these gates with your initials in the middle of the symbol
- ensure all layouts in
this lab use standard cell frames
that snap together end-to-end for routing vdd!
and gnd!
- use a standard cell height taller than you
need for these gates so that it
can be used for more complicated layouts in the future
- ensure gate inputs,
outputs, vdd!, and gnd! are all routed on metal1
- Use cell names that
include your initials and the current year/semester, e.g. NAND_jb_f19
(if it were fall 2019)
- Using Spectre simulate the logical operation of the gates for all 4 possible inputs (00, 01, 10, and 11)
- comment on how timing of the input pulses can cause glitches in the output of a gate
- Your html lab report should detail each of these efforts
- Below shows (click for a larger image): 1) schematic of a 2-input NAND gate, 2) schematic of a 2-input XOR gate, 3) simulation schematic, 4) example pulse statement to generate a digital input, and 5) simulating the operation of the gates for all 4 possible inputs.
- Using these gates, draft the schematic of the full adder seen below
- Create a symbol for
this full-adder (example)
- Simulate,
using Spectre, the operation of the
full-adder using this symbol
- Layout the full-adder
by placing the 5 gates end-to-end so that vdd! and gnd! are routed
- full-adder inputs and outputs can be on metal2 but not metal3
- The cells used to generate the images used on this webpage are found in lab6.zip
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As
always ensure that your html lab report includes your name and email
address
at the beginning of the report (the top of the webpage).
When finished backup your work (webpages
and design
directory).