EE 421L

Fall 2023 semester

Authored by Josh Jensen

jensej3@unlv.nevada.edu


 

TitleClass DateDue DateLab Topic
Lab 130 August6 SeptemberIntroduction to html reports and Cadence Virtuoso
Lab 26 September13 SeptemberDesign of a 10-bit digital-to-analog converter
Lab 313 September20 SeptemberLayout of a 10-bit digital-to-analog converter
Lab 420 September27 SeptemberIV characteristics and layout of NMOS and PMOS in ON C5 process
Lab 527 September11 OctoberDesign, layout, and simulation of a CMOS inverter
Lab 6 11 October25 OctoberDesign, layout, and simulation of CMOS NAND, XOR, and Full Adder
Lab 725 October8 NovemberBus and array usage in word inverters, muxes, and high-speed adders
Proj8 November29 NovemberFinal project: noninverting buffer (charge pump)
Lab 829 November6 DecemberGeneration of a test chip layout for fabrication

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