EE 421L Digital Electronics Lab #1

Authored by Jonathan Young on August 31, 2015
Email: youngj1ATunlv.nevada.edu


Lab Topics:

Laboratory Introduction, Generating, and Posting HTML lab reports.

Lab Description:

This lab will cover basic webpage editing, which will be used to post lab reports for the EE421L Digital Electronics lab. The report is expected to include images, demonstrating webpage editing and the use of the Windows Snip tool for capturing images. After demonstrating the use of basic web editing knowledge, the Cadence Tutorial 1 will be followed with various image captures that were self-produced being posted to show adherence to the tutorial provided. Lastly, the report will cover how lab reports will be backed up and show proof via use of image captures.

Web Editing Knowledge:

The lab reports in this class will be displayed in an HTML webpage. Thus, basic knowledge of adding images and text in HTML is essential to completing these reports. Once these reports are done, they will then be uploaded to the website using the File Transfer Protocol (FTP). After the files are uploaded to the FTP, they will be displayed in the student's respective lab directory.

Sample HTML code
Figure 1: This demonstrates the coding ability of HTML. This code directly displays text on an HTML webpage, adding images to an HTML webpage is similar.
FTP Management
Figure 2: This demonstrates the management of the HTML lab report files on the CMOSedu website server.

The use of the Windows Snip program will be useful for generating images that are small in size, to prevent taking up unnecessary space as well as ensure the content that needs to be displayed is displayed without clutter.

Use of Windows Snip tool
Figure 3: This figure demonstrates the use of the Windows Snip program.

Cadence Tutorial 1:

The MobaXterm program will be used to communicate with the Cadence server located at UNLV. Cadence is a computer program, that allows designers to create integrated circuit chips and fabricate them. This tutorial is covered up to image 25, which begins the simulation of the schematic that was designed, i.e. a voltage divider.

Cadence Login Window
Figure 4: This screen capture is the Cadence login window presented with the MobaXterm program.
Showing CMOSedu contents
Figure 5: This screen capture shows the creation of the CMOSedu folder, along with the extraction of the class folders, Tutorial_1 creation, and a Homework folder. These folders contain schematics, simulations, and layouts from the course book for use with cadence.
Showing contents of cds.lib file
Figure 6: This screen capture shows the cds.lib file (modified), which contains the definitions for all the libraries, which reference the folders created above. This allows them to be included in the Tools>Library Manager and will ensure they are pointing to the appropriate folder location created above in figure 5.
Showing CMOSedu contents
Figure 7: This screen capture shows the Tools>Library Manager in action. Note: This is the result of creating the folders & files in CMOSedu as well as properly defining them in the cds.lib file. This allows us to reference course examples and create our own within Cadence, such as that shown below by following Tutorial 1.
Schematic of Voltage Divider
Figure 8: This screen capture shows the schematic of the voltage divider, created from Tutorial 1. Given that the resistors are of equal value; the input voltage is reduced by half. Since the input is 1 Volt DC, then the output is 0.5 Volts DC.
Loading Cellview for Cadence Simulations
Figure 9: This screen captures shows the loading of a Cellview. This is useful when needing to load an already saved state, Cellview. A saved Cellview allows one to save the current simulation settings and thus restore them at a later time without having to manually re-entering all these settings every time.
Simulation Settings in Cadence
Figure 10: This screen capture shows what content a "Cellview" will store. This is also how simulation settings will look and control the running of the simulation in Cadence. To run a simulation, click the Green 'Play' button. Cadence will use the above settings to generation a simulation output, such as that below.
Simulation of Voltage Divider using Cadence
Figure 11: This screen capture shows the simulation result of the Voltage Divider, shown earlier. The results match what was expected, with the green line being the 0.5 Volts DC output and the red line being the 1 Volt DC input.

Lab Report Back Ups:

Lab report back ups will be backed up according to the schedule in Figure 12, below. This will ensure that should files become corrupted or accidently deleted that they can be restored using the Time Machine program of Mac OS X.

Time Machine Backup
Figure 12: This figure demonstrates a backup solution on the Mac OS X system, which is responsible for backing up all my Windows virtual machine files to an external back up source.
Time Machine File Restoration
Figure 13: This figure demonstrates how to restore files & folders using the Time Machine program in Mac OS X.