Stephanie Silic

Email: silics@unlv.nevada.edu

I am in my final year at UNLV pursuing a Bachelor's degree in Electrical Engineering, and will be graduating in May 2017. The areas of engineering I have studied which have been my focus include feedback control systems, solid state devices/material science and nanotechnology, and integrated circuit design and layout. I will hopefully be specializing in one or more of these areas in my professional career. In addition to some work here with the Cadence Virtuoso layout tool, I am currently participating in the Graduate College Reasearch and Mentorship Program, RAMP, which is giving me hands-on experience in experimental research with PhD candidate Sanjana Das.

Return