Lab 1 - EE421L 

Authored by Rhyan Granados

Email: granar1@unlv.nevada.edu

8/26/20

Goal

To go through the 1st part of Tutorial 1 link, post images of the tutorial with brief descriptions, and a declaration of how we will do our regular backups. 

Prelab

We are to request a CMOSedu account, go through the procedure of editing webpages, and finally publishing it to the official page.
   Below is a screenshot demonstrating  that I followed the Prelab video link.

The Lab

1)

For the first part of Tutorial 1 is an introduction to Cadence 6.1 and Virtuoso for simulations.

   The first most significant step is to download NCSU Cadence Design Kit version 1.6.0 beta link

Then after extracting it and uploading it to our home directory, we added various lines to various files from the NSCU kit.

       Below is a screenshot of my .bashrc file with four lines added to the bottom.

We also deleted files within the NSCU, then we re-uploaded them to get around a bug. This is so that we can use DRC, Extract, and LVS

   our layouts.  

Now we are ready to start Cadence, create a libary, and simulate circuits.

Below is our circuit that we've drafted with the help of various hotkeys

Below is our voltage readings for our input(right) and output(left) voltages

2)

To address the method in which I will do my backups, I have made a folder for it called EE421L in my Google drive where I will upload each one. 

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