Lab 04 - ECE 421L 

Authored by Aaron Escobedo

9/26/17

Prelab :: Follow the instructions and complete Tutorial 2

 Here is some of my data from Tutorial 2

                                                                            NMOS Transistor Data

Initial NMOS Transistor Schematic

Initial Symbol View of NMOS Transistor

Initial Layout View of NMOS Transistor

Initial Extracted View of NMOS Transistor

Initial PMOS Transistor Schematic

Initial Symbol View of PMOS Transistor

Initial Layout View of PMOS Transistor

Initial Extracted View of PMOS Transistor

Initial NMOS transistor testing schematic

Results from Varying VGS from [0,5] with 1V steps

Setting up VDS = 100mV and Varying VGS from [0,2] in 1mV steps

Results from said testing setup

Initial PMOS transistor testing schematic

Results from Varying VSG from [0,5] with 1V steps

Layout Design with passed DRC

Extracted View of Layout

Extracted View focused on the PMOS

Corresponding Schematic for PMOS with pads

Results from LVS - Netlits match!