Lab 8 - EE 421L: Digital Integrated Circuit
Design Laboratory
Eric
Monahan
Isaac
Robinson
robins82@unlv.nevada.edu
12/07/2016
Chip 5
Chip
5 consists of the following circuitry:
·
A 31-stage ring
oscillator with a buffer for driving a 20 pF off-chip load.
·
NAND and NOR gates using
6/0.6 NMOSs and PMOSs.
·
An inverter made with a
6/0.6 NMOS and a 12/0.6 PMOS.
·
Transistors, both PMOS
and NMOS, measuring 6u/0.6u.
· A 25k n-well resistor and 10k poly2 resistor implemented in a voltage divider setup, as well as a separate layout for the 25k n-well resistor.
·
A
detector circuit that detects the input sequence 101011.
·
A
synchronous buck converter which outputs a constant 2.5v with varying VDD and
Temperature. The circuit has been tested
up to 100mA.
Chip 5 - pad frame
Our pad frame layout encorporates ESD protection on all the pins to help
prevent damage to internal circuitry.
The layout view can be seen below in figure 1.
Figure 1
Chip 5 – The schematic with pin connection is seen below in Figure 2. **NOTE** all gnd! Connections are to pin<20>.
Figure 2
Chip 5 – Pin table **NOTE** pin <20> is used as a global ground.
|
Component |
VDD |
IN 1/Source |
IN 2/Drain |
Out/Gate |
Connect Pin<20> |
|
25k Resistor |
n/a |
Pin 22 |
Pin 23 |
n/a |
no |
|
10k-25k Res |
n/a |
Pin 23 |
Pin 25 |
Pin 24 |
no |
|
NOR |
Pin 8 |
Pin 5 |
Pin 7 |
Pin 6 |
yes |
|
NAND |
Pin 15 |
Pin 13 |
Pin 16 |
Pin 14 |
yes |
|
31 Ring Osc. |
Pin 11 |
Pin 12 |
n/a |
Pin 10 |
yes |
|
6u/.6u PMOS |
Pin 26 |
Pin 27 |
Pin 29 |
Pin 28 |
n/a |
|
*6u/.6u NMOS* |
n/a |
Pin 31 |
Pin 30 |
Pin 32 |
yes |
|
12u/6u Inverter |
Pin 33 |
Pin 34 |
n/a |
Pin 35 |
yes |
|
Buck Converter |
Pin 40 |
Pin 18 |
n/a |
Pin 4 |
yes |
*NMOS* Pin <20> is the Body of the MOSFET*
|
Component |
VDD |
Clock |
Input |
Detect |
Ground |
|
Detector |
Pin 38 |
Pin 36 |
Pin 37 |
Pin 39 |
Pin 20 |
Chip 5 – Testing instructions **Pin <20> is global ground**
- 31-Stage Ring
Oscillator *connect pin<20> to ground*
- To power the ring oscillator connect pin<11>.
- The input of the oscillator is pin<12>.
- The output of the
oscillator can be observed from pin<10>.
- The output of the
oscillator has already been buffered on-chip so that the oscillator can
handle a 20 pF off-chip load.
- NAND and NOR gates *connect pin <20> to ground*
- NAND
- To power the NAND
gate connect pin<15> to a power supply.
- Input A is pin<13> and input B is pin<16>.
- To measure the
output use pin<14>.
- NOR
- To power the NOR
gate connect pin<8> to a power supply.
- Inputs A and B are
again pin<7> and pin<5> respectively.
- The output is
measured from pin<6>.
- 12u/6u Inverter *connect pin<20> to ground*
- To power the inverter connect pin<33> to a power supply.
- The input of the
inverter is pin<34>.
- The output is
measured from pin<35>.
- 12u/.6u PMOS and NMOS
- PMOS
- The gate of the PMOS
is connected to pin<28>.
- The source of the
PMOS is connected to pin<27>.
- The drain of the
PMOS is connected to pin<29>.
- The body of the
PMOS is connected to pin<26>.
- In order to avoid
body effects of the PMOS the body should be connected to VDD from the
power supply. Otherwise, the characteristics of the PMOS will vary.
- NMOS *connect pin<20> to
ground*
- The gate of the
NMOS is connected to pin<32>.
- The source of the
NMOS is connected to pin<31>.
- The drain of the
NMOS is connected to pin<30>.
- The body of the
NMOS is connected to pin<20>.
- Detector *connect pin<20> to ground*
- The detector circuit is designed to receive the input of 101011 on
the rising edge of the clock signal.
When this occurs the circuit will output VDD.
- Connect pin<20> to ground.
- Connect pin<38> to the power
supply.
- The clock signal
input is pin<36>.
- The input signal is
pin<37>.
- To measure the
detected signal connect to pin<39>.
- Voltage
divider, and resistors
- 25K resistor
- In order to test
the 25k resistor connect one end of the multi-meter to pin<22> and the other end to pin<23>.
- 10K resistor
- Connect one end of
the multi-meter to pin<23> again and the other end to pin<24>.
- Voltage divider
- There are two
possible ways to connect the voltage divider circuit. One way will result in Vout being
71.4% of Vin, or Vout being 28.6% of Vin.
- Vout=Vin*28.6%
- Connect pin<23> to ground.
- Connect Vin to pin<25>.
- To measure Vout connect to pin<24>.
- Vout=Vin*71.4%
- Connect pin<25> to ground.
- Connect Vin to pin<23>.
- To measure Vout connect to pin<24>.
- Synchronous
Buck Converter *connect pin<20> to ground*
- The Synchronous Buck
Converter is designed to drive a load from 0-100mA. An off-chip inductor and capacitor is
needed for this circuit, refer to figure 3 below.
- Connect pin<20> to ground.
- Connect pin<4> to an off chip
inductor capacitor circuit refer to figure 3 below, pin<4> is Out.
- Connect Vout of the
off chip circuitry to pin<18>
refer to figure 3 below, pin<18>
is IN.
- Double check all the
connections before applying power to the chip, Vout from figure 3 below
has been tested with loads varying from 0 to 100mA’s and will maintain a
constant 2.5v Output.
- Once all connections
have been double checked connect pin<39>
to the power supply. The power
supply can vary from 4V-5.5V.
Figure 3
Refer to
figure 4 below for pin position on a typical 40 pin chip.
Figure 4
Chip 5 files can be found here
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