Lab 03 – EE 421L

Authored by Chandon Esplin,

EsplinC2@UNLV.Nevada.edu

09/21/2016 

  

Layout of a 10-bit digital-to-analog converter (DAC) 

 

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Pre-Lab Objectives

Learn the necessary skills required for the layout of more complex circuits. Reinforce the habit of backing up and storing previous versions of both completed work and the technical libraries used. Further develop and expand upon foundational skills with Cadence software.

 

Pre-Lab Tasks

1.     Back-Up All Previous Work

2.     Finish Cadence Tutorial 1

 

 

 

Lab: Layout of a 10-bit digital-to-analog converter (DAC)

 

Experiment(s):

·      Use the n-well to layout a 10k resistor

·      Use this n-well resistor in the layout of your DAC

·      Ensure that each resistor in the DAC is laid out in parallel having the same x-position but varying y-positions

·      DRC and LVS, with the extracted layout, your design

·      Zip up your final design directory and place it in the lab3 directory, with a link on your lab report  

      

Results:

*This laboratory experiment focused on the layout of the previously designed and simulated DAC. For simulation results please see:

         Design of a 10-bit digital-to-analog converter (DAC)

 

Completed DAC Layout

 

Use the n-well to layout a 10k resistor

Resulting 10k n-well resistor

 

         Use this n-well resistor in the layout of your DAC

10K resistor as used in layout (stop level set at 0)

Once the 10k resistor has been completed, saved, and passed all design rule checks, it can be instantiated in any other layout through [i] – instance and selected from the component browser.

 

Ensure that each resistor in the DAC is laid out in parallel having the same x-position but varying y-positions

Perfectly aligned along Y-Axis

Using [c]-copy, in combination with ‘Orthogonal’ ensures that the copied component is constrained to vertical or horizontal placement

 

DRC and LVS, with the extracted layout, your design

DRC Results:                                 

LVS Results:

 

Zip up your final design directory and place it in the lab3 directory, with a link on your lab report 

 

Laboratory 3 Design Directory

 

Discussion:

How to select the width and length of the resistor by referencing the process information from MOSIS?

The parameters of the n-well must first be determined from the provided data sheets.

 

Once R□ (Ω/□) has been determined the ratio of L/W can be determined as follows:

            R = R□(L/W) ŕ (L/W) = R/R□

Once an appropriate width is chosen, the length can be scaled by the determined ratio and checked to ensure it aligns with the design grid.

 

How the width and length of the resistor are measured?

The length and width of the resistor can be measured and displayed using [k] – create ruler. The properties window [q] show the values, μm units, as (x,y) coordinates as seen below.

 

 

 

 

 

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