Lab 1 - EE421L: Digital Integrated Circuit Design

Authored by Russ Prado,

prador@unlv.nevada.edu   

8/31/2015

  

Lab description:

Procedures:

1. Request your username and password from Dr. Greg, then install MobaXterm

2. Download the NCSU Cadnece Design Kit(CDK) version 1.6.0 Beta set up onto MobaXterm. Then download the diva_rul_files.zip and use these files to replace the current ones on CDK(this is to repair a bug on the current beta version).
 http://cmosedu.com/jbaker/courses/ee421L/f15/students/prador/lab1/Step1.JPG      
 
3. Start up Cadence and create a new library titled "Tutorial_1"
http://cmosedu.com/jbaker/courses/ee421L/f15/students/prador/lab1/Step4.JPG
 
4. Create a new schematic through the Library Manager and design the circuit to be run
  http://cmosedu.com/jbaker/courses/ee421L/f15/students/prador/lab1/Step6b.JPG  
 
5. Run this schematic using Transient Analysis with a 1 second stop time, graphing the Vin and Vout

http://cmosedu.com/jbaker/courses/ee421L/f15/students/prador/lab1/Step8.JPG

 

6. Back up work by uploading files on Google Drive in case for possible issues

http://cmosedu.com/jbaker/courses/ee421L/f15/students/prador/lab1/Step9.JPG

 

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