Lab 1 - EE 421L

Braxon Tawatao

tawataob@unlv.nevada.edu

9/5/2014

The purpose of this first lab is to both setup a working environment for which to run Cadence and to get experience in creating webpage.

To accomplish this, Tutorial 1 is followed with screenshots taken along the way.

 The first step to this tutorial was to download and extract to the HOME directory within the Cadence server the NCSU Cadence Design Kit (CDK) version 1.6.0 beta from the NCSU CDK site.

Note: In order to download this CDK a valid email must be registered.

 Once the compressed tar file has been placed on the server it can be extracted using:

tar -xvf NCSU-CDK-1.6.0.beta.tar 

and

tar -xvf ncsu-cdk-1.6.0.beta.tar.gz

The next step is create a new directory named CMOSedu using the command: mkdir CMOSedu and also add the following lines to the .bashrc file:

export SPECTRE_DEFAULTS=-E

export CDS_Netlisting_Mode=Analog

export CDS_LOAD_ENV=CWDElseHome

The .bashrc file can be editted on the server with the terminal text editor, nano, using: nano .bashrc, or if using MobaXterm, can be editted using a text editor from your desktop.

Next, rename the following files to include a period at beginning of the filename:

cdsinit -> .cdsinit

simrc -> .simrc

cdsenv -> .cdsenv

 And continue on to edit the cds.lib file located in the CMOSedu directory to include the following lines:

DEFINE analogLib /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/analogLib

DEFINE functional /usr/cadence/IC615/tools.lnx86/dfII/etc/cdslib/artist/functional

Also add envSetVal("asimenv.startup" "simulator" 'string "spectre") to the .cdsinit file.

Lastly, to complete the setup of this simulation environment replace the files divaDRC.rul, divaEXT.rul, and divaLVS.rul found in the $HOME/ncsu-cdk-1.6.0.beta/lib/NCSU_TechLib_ami06 directory with those same files extracted from diva_rul_files.zip.

 The next part of Lab 1 will consist of a short simulation using Cadence to verify that the environment works.

Opening Cadence:

SSH into the cadence server cluster using your username and password. Navigate to the CMOSedu directory and run the command, virtuoso &.

The following window will then open:

Next create a new library by navigating to file, new, then library.

Settings for new library (using AMI 0.60u C5N (3M, 2P, high-res) is important!!):

After the library has been created, create a new cell using similar steps: file, new, then cell.

Cell settings:

 Once the cell has been made, a new window will open. In this window circuit schematics can be placed.

Firstly, add a resistor component from the NCSU_Analog_Parts library downloaded earlier. Use the settings shown below:

The properties of an individual component can be changed by pressing the bindkey q when the component is selected.

This image illustrates the resulting edit properties window:

By adding another resistor, a dc voltage source, and a ground from the same NCSU library, a voltage divider circuit can be built:

 With the bindkeys w and l wires can be placed and labeled, respectively.

Now with the final circuit completed make sure to check and save before simulating. To simulate press the launch button in the top left corner of the window then select ADE L.

This is the opening window of the Virtuoso ADE:

We are using Spectre to simulate and can verify that this is the case by clicking the setup option in the ADE.

A transient analysis simulation of the circuit can now be run, but first, the wires to analyze must be selected using the Select on Schematic option:

 After choosing the wires for analysis, the green play button (Netlist and run) can be pressed to run the simulation which, in this case, gives the following results:

The simulation ran correctly and the voltage at Vout was shown to be divided by 3.

Lastly, as a note, we are able to save/load states for simulation by selecting the Session menu in the ADE window. This option is very helpful in saving time.

 I will be using Dropbox to keep backups of all of my lab reports:

Return to lab directory here.