Lab 1 - EE 421L 

 Authored by Brian Smith (smith945@unlv.nevada.edu),

 8 September 2014

The first part of this laboratory exercise is to follow part of the first Cadance tutorial on CMOSedu.com, located here, which consists of setting up Cadance 6.1 as well as creating and simulating a simple voltage divider in the C5 process.

Since I already had Cadence set up, I started by creating a new library and attaching the technology library for the C5 process.

Then, after creating a new cell view for the schematic, I created a 10K ohm resisters from the appropriate library.

After placing the two resistors, I repeated the process to add a 1 volt DC voltage source ('vdc') to supply the power and a ground symbol ('gnd') to mark the ground net. These were both from the same NCSU_Analog_Parts library. Then I wired the components, labeled the nets to be measured and clicked "check and save" to check for errors and save the schematic.

Now that the schematic had been finished, I ran the ADE L program from the launch menu. I created a transient analysis to run for 1 second and selected the "in" and "out" wires to have their voltage plotted. 

Before running the simulation, I saved the state (Session->Save State), then clicked the green button to run the simulation. This was the result:

That was all for the tutorial. The last part of this laboratory exercise is to layout how I plan to backup my files. I am going to use Google Drive. This is done in two steps. Firstly, I zip up the file:

Secondly, I drag and drop the file into my google drive folder that I have set up for this class:

Note that I have saved the date in the file name for each upload. This is to avoid confusion. Google Drive will not overwrite files and will save duplicates with the upload date, but having multiple files with the same name can quickly become a mess.

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