Lab Final Project - Part 2 - Layout of an 8-bit ALU



Authored by Nolan Moore
Date: November 22, 2013
Email: mooren14@unlv.nevada.edu

Project Directions
Project Part 2 .jelib
Lab 7 .jelib (may be required for project .jelib)
Lab 6 .jelib (may be required for project .jelib)
Stimuli data for IRSIM simulation of ALU

Introduction

For the final project in this class, the labs that we have performed up to this point will culminate in a final device called an ALU or Arithmetic Logic Unit. ALUs perform arithmetic functions, such as addition or subtraction, and logical operations, such as AND and OR. The ALU that we will design for this project will utilize all 4 of these operations. Additionally, the ALU will operate on 8-bit inputs and outputs.

The inputs will consist of two 8-bit signals A and B that will be the operands and a 2-bit signal F used to determine which of the 4 operations will be performed. The output will be another 8-bit signal Z. Previously in Lab 7, we created 8-bit versions of each of the logic gates and full adders used in the ALU, and we will be utilizing these previous designs to complete our project.

Seen below is the schematic of thr ALU. The inputs A and B are directly connected to the AND and OR gates, but only A is directly connected to the full adder. B and its inverse B`are connected to a 2-1 MUX that is switched depending on whether addition or subtraction is used. The output of this MUX then goes into the full adder. Another MUX determines whether AND or OR will be used, and the final output is determined by another MUX to be either one of the logical operations or the arithmetic operations. F[0] is used to determine whether AND or OR is used and also whether addition or subtraction is used. F[1] determines the final output.

Complete 8-bit ALU Schematic



Layouts of 8-bit components

AND gates



OR gates



Inverters



Full Adders



2-to-1 MUXes



Complete Design

Unfortunately, the design was unable to be finished. Lack of knowledge of proper connections for the ALU were the cause. It was thought to design a 1-bit ALU and combine 8 to form a full 8-bit ALU.

8-bit ALU layout



1-bit ALU schematics



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