Lab 1 - ECE 421L 

Authored by Stryder Loveday,

August 30, 2013 

In this lab we will be going over the first portion of the first Electric VLSI tutorial.  The first tutorial will cover the layout and simulation of a resistive voltage divider.

To begin, we will want to start Electric, which has been installed and the basic settings have been configured previously.  For further information on this process, read the instructions laid out here.

 We want to change the color scheme to something easier to write on when we add notes onto our designs.

Go to Window -> Color Schemes -> White Background colors.

Next, adjust the window sizes to fill the available space.



We want to set up Electric to use ON Semiconductor's C5 process, and our fabrication will use MOSIS.  Will be using scalable CMOS (SCMOS) submicron design rules.

Go to File -> Preferences, then Technology ->Technology to get to the option window shown below.  Change the information to match what is shown in the image.  Note that "Analog" Technology is selected, which allows resistor and capacitor Nodes in the Component menu.



The scale lambda (λ) that we will be using for the C5 process is 300 nm, using the MOSIS Scalable CMOS (mocmos in Electric) submicron design rules.

To set the scale, go to File -> Preferences -> Technology -> Scale and set the mocmos scale to 300 nm, as shown in the image below.



Press the OK button to exit.  Select Mark All Libs in the next window, to save these process changes to all libraries.

The preferences used by Dr. Baker can be imported from electricPrefs.xml (right click to save), which can be used if there are problems or to have consistency throughout the tutorial.

To import preferences, go to File -> Import -> User Preferences, and select the file previously downloaded.

We now have Electric set up to fabricate a chip in the C5 process using MOSIS.

Now, go to File -> Save Library As -> tutorial_1.jelib

Next, we will begin to draw our schematic for a resistive divider.  Go to Cell -> New Cell and enter the cell name (R_divider) and view (schematic) seen below.



Select the Component tab on the left side of the window.  The library name and cell name are seen above the Components, Explorer, and Layers tabs.

In the Component menu, there is a box with a resistor and the word "Normal".  Click on the arrowhead in this box, and select N-Well.  This selects the N-Well schematic resistor Node.

In Electric, a Node is a component used in a layout or schematic.  Transistors, capacitors, and resistors are examples of nodes.  An Arc is used to connect Nodes together to form a layout or schematic.  An example of an arc in a schematic is a wire.

Place an N-Well schematic resistor Node into the drawing area as seen below (use your left mouse button to place the Node).

The Window menu contains the commands to zoom, fit, and change the windows after placing the Node.



All Nodes have a box that highlights when the Node may be selected, when the cursor is over it.  If multiple Node highlight boxes overlap, hold Ctrl and click to cycle through the multiple boxes.  Holding Shift while clicking will select/de-select highlight boxes.

Select, by clicking on the Node, the N-Well resistor Node.  Go to Edit -> Properties -> Object Properties, or press Ctrl + I, to edit the properties of this node, as shown below.  The sheet resistance of an n-well in the C5 process is roughly 800 ohms.

The minimum width of an n-well is 12 lambda, so lets try making a tok resistor using a width of 15, and a length of 187.5.  Enter the values as shown below.If the field for the Well resistance isn't showing, hit the More button.



Press OK to save your changes.

We now have a schematic representation of a 10k N-Well resistor, as shown below.



This concludes the first portion of the tutorial for using Electric.

We would like to now cover ways to backup your work, to keep a copy safe if a file becomes corrupted or unintentional changes are made and saved.  There are multiple ways to back up work, but we will discuss E-mailing files to yourself to keep a copy safe and unchanged.

First, select the files you wish to save.  Right-click, and select Send to -> Compressed (zipped) folder.  The resulting folder is shown below.



This file can now be sent via E-mail as an attachment to yourself to preserve your file for future use.



This concludes the Lab 1 report for EE 421.

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