EE-420 Lab 1
For
this first lab simulate, and verify the simulation results with
experimental
measurements, the circuits seen in Figs. 1.21, 1.22, and 1.24 (use a 1
uF cap in place of the 1 pF cap) of the book.
Your results
should be similar to, but more complete than, the simulation results
seen on
pages 17 - 23. In your report, and for each circuit, show the
From
the simulation Vout laggs Vin with a voltage of 0.623V and a time delay
of 713.6x10^-6 seconds which matches our hand calculations.
measured values.
This is the circuit from fig 1.22 in the book. It is an RC circuit with a voltage source of 1V at 200Hz with a 2x10^-6F capacitor in parallel with a 1x10^3ohms resistor in series with a 1x10^-6F capacitor
Using the formula from the book we can calculate the parralel impedence.
calculating Vout/Vin inputing Z from the equation above
then i calculated the magnitude of the gain
the hand calculated magnitude of the gain is 0.6935 the angle of the gain is calculated with
the angle is calculated to be -0.119 radians or -6.841 degrees. this angle can be used to solve for the time delay with this equation
this gave us a calculated time delay of-95x10^-6 seconds.
From
the simulation Vout laggs Vin with a voltage of .7033V and a time delay
of 94.57x10^-6 seconds which matches our hand calculations. which
matches
the hand calculations.
This is the circuit from fig 1.21 in the book. Figure 1.23 is the same as fig 1.21, but looked at with AC analysis
Frequency |
10Hz |
100Hz |
1kHz |
10kHz |
100kHz |
1MHz |
Vout/Vin (Gain) simulated |
0.998032 |
0.846733 |
0.157177 |
0.0159135 |
0.00159155 |
0.000159155 |
Vout/Vin (Gain) measured |
1 |
0.83 |
.166 |
0.0212 |
0.016 |
0.0064 |
db |
0dbdb |
-1.618db |
-15.60db |
-33.47db |
-35.917db |
-43.8764db |
This is the circuit from fig 1.24 in the book. It is the same as fig 1.21, but it has a pulse wave input.
we can find the time delay with this equation
which is 700x10^-6 seconds. We can also find the rise time with this equation.
which is 2.2x10^-3 seconds we can verify this with LTspice
td |
tr |
|
theoretical |
700us |
2.2ms |
simulated |
709.3us |
2.208us |
experimental |
700us |
2.200ms |