Lab 9 - EE 420L 

Authored by Iain Drews drewsi2@unlv.nevada.edu

4/22/15 

  

Lab description

 

In this lab you may need to use two, or more, CD4007 chips from the same production lot (see date code on the top of chip) to ensure using a BMR to bias a current mirror is possible. If the CD4007 chips are not from the same production lot they will not "match" so current mirrors will not be possible.


Yellow VDD
Purple: Vbias P
Blue: Vbias N
Note how VbiasP is relative to VDD and VbiasN is relative to GND
from this we can determine
VDD-VSG=3.32
and VSG=1.40
Yellow VDD
Purple: voltage across a 1k ohm resistor for current
Blue: Vbias N
152mv/1kohm= 152uA
Yellow VDD
Purple: Vcascodep (VG on the first cascode mosfet)
Blue: Vbias N
note how the voltages mirror VDD when they reach threshold
Yellow VDD
Purple: voltage across a 1k ohm resistor for current
Blue: Vbias N
218mv/1kohm= 218uA
Yellow VDD
Purple: VDD-Vdsat
Blue: VCascoden (VG on the first cascode mosfet)
Note how the voltages flatten out and stop mirroring vdd when they reach threshold
Yellow VDD
Purple: voltage across a 1k ohm resistor for current
Blue: VCascoden
176mv/1kohm= 176uA

 


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