Final Project - EE 420L

Authored by: WENLAN WU (Stephen)

E-mail: wuw2@unlv.nevada.edu

Date: 5/5/2014

Pre-lab work

1. Review the datasheet of the CD4007 CMOS transistor array. 

2. Understand the body pin of NMOS is the pin 7 and the body pin of PMOS is the pin 14. So make sure the pin 7 is connected to ground and pin 14 is connected to VDD, 5V. 

Lab description

Project aims to design a general op-amp using resistors and capacitors and two CD4007s.

1. First, use the models in lab8 ( MOSFET_model.txt) to design the opamp with different gain and loads and simulate it. 

2. Second, build up the opamp on PCB using many resistors and capacitors. And get the experimental results

3. Compare simulation results and experimental results.

Finally, Don't forget to backup your report and work directory on your computer or dropbox and upload it to the CMOSedu.com for the future study and discussion.

Project:

1. Based on the following circuit, design the LTspice model of the opamp. Then simulate it and get the frequency response. Vary the load and simulate it.

2. Use the proposed opamp to design the non-inverting and inverting topologies. Also simulate them and get the frequency response. Change the load and simulate it again.

3. Build up the circuit on PCB and get the experimental results. Use different loads and get the results.

Summary:

From above experiments, it is a good chance to design general opamp using two CD4007 chips

Backup:

Right click the mouse to compress the final fold into "final.rar". And backup to study folder (e.x. dropbox) or email to myself.

Return to the listing of my labs

Return to the whole class reports

Return to the EE421L

Return to the CMOSedu.com