I have a question about the MOS switching resistance calculation for the bookís

long-channel process discussed in Sec. 10.1. Using Eq. (10.6) a value of

4.72k ēL/W is calculated but, as seen in Table 10.1, the value calculated from

Fig. 10.5 is 15k ēL/W. Why the large difference?

 

Equation (10.6) assumes a constant value of KP, constant threshold voltage, and

that the devices follow the square-law equations...they don't. The results will be (are)

different from the results we get when KP is varying (from, for example, velocity

saturation). This equation is useful to understand where the model comes from but in

all practical cases it's better to use simulations to determine the effective switching

resistance since the results come from measurements (the MOSFET models are

determined empirically). Note that this question was already answered immediately

following Fig. 10.6 and Eq. (10.6) on page 314.

 

 

Itís important to understand that unless the CMOS technology you are dealing with is

very old, say channel lengths 5 um and longer, the square-law equations donít model

the devices well. Even for the 1 um devices discussed in the book using the square-law

equations to model their electrical behavior is questionable. For example, the NMOS

output resistance plotted in Fig. 9.24 varies from 2.5 to 7 MW with changes in VDS

even though VGS is constant. The equation for the output resistance derived from the

square-law equations, Eq. (9.6), predicts a constant output resistance. Again though,

as mentioned in the preface, mathematical rigor is needed when learning circuits so

even though the square-law equations have limited practical use itís still a good idea

to use them so that the students can derive various parameters and equations governing

circuit operation. It just needs to be clear that the results will not match the silicon (or

the simulation results) but rather just be close (for L of 1 um and longer, square-law

equations are useless in nanometer CMOS technology and so the graphical approach

presented in the book must be used when designing).

 

Note that we could have avoided comparing simulation results, like the ones seen in

Fig. 9.24 and literally dozens of other figures in the book, to hand calculations or

simply used a Level 1 SPICE model (the model derived from square-law equations)

instead of real devices and models. Both of these approaches are very, very common

in textbooks. Unfortunately though both are impractical if at some point the engineerís

or studentís calculations have to be used as a starting point to design real silicon circuits.

Fiddling with a design in SPICE until it works, under one set of conditions, with no

concrete starting point or understanding of the circuitís operation and limitations, isnít

wise. Simulate what you think will work based upon your calculations and then

investigate any significant differences between your understanding and the simulation

results.

 

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