Lecture
notes and videos for EE 421 Digital Electronics and ECG 621 Digital
Integrated Circuit
Design, Fall 2013
December 9 – final exam (comprehensive), 6 to 8 PM, closed book and notes. (A practice exam is found here.)
December 4 – lec27_ee421_ecg621.pdf and lec27_ee421_ecg621_video – review for the final exam
December 2 – lec26_ee421_ecg621.pdf and lec26_ee421_ecg621_video – course evaluations, introduction to the design of memory
November 27 – lec25_ee421_ecg621.pdf and lec25_ee421_ecg621_video – more help on projects, dynamic logic gates
November 25 – lec24_ee421_ecg621.pdf and lec24_ee421_ecg621_video – discuss projects
November 20 – lec23_ee421_ecg621.pdf and lec23_ee421_ecg621_video – clocked circuits, latches and flip–flops
November 18 – lec22_ee421_ecg621.pdf and lec22_ee421_ecg621_video – more buffers, static logic, nand/nor gates, complex CMOS logic gates
November 13 – lec21_ee421_ecg621.pdf and lec21_ee421_ecg621_video – intro to buffers, other inverter configurations
November 6 – lec20_ee421_ecg621.pdf and lec20_ee421_ecg621_video – inverter switching point, noise margins, delay through an inverter
November 4 – lec19_ee421_ecg621.pdf and lec19_ee421_ecg621_video – capacitive effects, process characteristic time constant, the inverter
October 30 – lec18_ee421_ecg621.pdf and lec18_ee421_ecg621_video – examples, using the MOSFET as a pass gate, MUX/DEMUX
October 28 – lec17_ee421_ecg621.pdf and lec17_ee421_ecg621_video – the digital MOSFET model, Miller capacitance, effective switching resistance
October 21 – midterm exam covering Chs. 1–6, open book and closed notes
October 18 – lec16_ee421_ecg621.pdf and lec16_ee421_ecg621_video – review for the midterm exam
October 16 – lec15_ee421_ecg621.pdf and lec15_ee421_ecg621_video – short–channel MOSFETs, velocity saturation, scaling, and DIBL
October 14 – lec14_ee421_ecg621.pdf and lec14_ee421_ecg621_video – review MOSFET operation, CLM, Cgs in saturation, SPICE modeling, body effect
October 9 – lec13_ee421_ecg621.pdf and lec13_ee421_ecg621_video – derive the square–law equations
October 7 – lec12_ee421_ecg621.pdf and lec12_ee421_ecg621_video – MOSFET capacitances in triode, cutoff, and saturation, threshold voltage
October 2 – lec11_ee421_ecg621.pdf and lec11_ee421_ecg621_video – MOSFET capacitances and qualitative discussion of IV curves of MOSFETs
September 30 – lec10_ee421_ecg621.pdf and lec10_ee421_ecg621_video – resistor temp co, MOSFET lateral diffusion and oxide encroachment, layout of large width MOSFETs
September 20 – lec9_ee421_ecg621.pdf and lec9_ee421_ecg621_video – silicided poly, hi–res poly, more MOSFET layout, and standard–cell layoutSeptember 18 – lec8_ee421_ecg621.pdf and lec8_ee421_ecg621_video – the poly layer and MOSFET formation
September 16 – lec7_ee421_ecg621.pdf and lec7_ee421_ecg621_video – the active and select layers, p–substrate and n–well connections
September 11 – lec6_ee421_ecg621.pdf and lec6_ee421_ecg621_video – vias, delay, contact resistance, crosstalk, ground bounce
September 9 – lec5_ee421_ecg621.pdf and lec5_ee421_ecg621_video – the metal layers, bonding pad, design/layout using the metal layers, parasitics
September 6 – lec4_ee421_ecg621.pdf and lec4_ee421_ecg621_video – diffusion capacitance, reverse–recovery time, RC delay through an n–well
September 4 – lec3_ee421_ecg621.pdf and lec3_ee421_ecg621_video – the n–well, sheet resistance, laying out an n–well resistor, pn–junction
August 28 – lec2_ee421_ecg621.pdf and lec2_ee421_ecg621_video – setting up Electric and LTspice, drawing schematics, and running simulations
August 26 – lec1_ee421_ecg621_video – course introduction, CMOS IC design, remote desktop, and using the CMOSedu Cadence examples