Lab 7 - ECE 421L 

Authored by Ronnie Moran, moranr1@unlv.nevada.edu

Today's date: 11/8/23


Prelab:






DRC/LVS



Lab work:


Here is my 4 bit inverter schematic:



4 bit inverter symbol view:


Here is the simulation setup and ADE sim:




Here is the 2:1 mux schematic:


Here is the symbol view for 2:1 mux:


Simulation in the ADE acting as a mux:


Here is the demux simulation



Here we are going to create 8 bit components that we convered in previous labs:


First, we are going to make an 8 bit inverter:

Schematic View

Symbol view



8 bit NAND:

Schematic view


Symbol view



8 bit AND:

Schematic view

Symbol view



8 bit NOR:

Schematic view

Symbol view



8 bit OR:

Schematic view


Symbol view



8 bit adder:

Schematic view



Symbol view



8 bit MUX :

Schematic view


Symbol view



Simulations for 8 bit components:


Layout




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