Lab 1 - ECE 421L 

Authored by Josue Magana Quezada 

Email: maganaqu@unlv.nevada.edu

09/05/2023

  

Lab description

For this lab, we will use html to post our reports, that is why is important to understand the basic concepts to edit and upload our files. In addition, following the tutorial for Candence is fundamental for the current lab practice.  

Prelab 

First of all, getting the username and password from Dr. Baker is important to get access into our ftp.cmosedu.com. After that, following the 1st tutorial for html is a good resource to start getting more experience. 

Lab Work

To begin with, keep in mind to follow our Tutorial 1 here so we remove our files (divaDRC.rul, divaEXT.rul, and divaLVS.rul) located on $HOME/ncsu-cdk-1.6.0.beta/lib/NCSU_TechLib_ami06. And download, unzip our new diva rul files, so we can add them in the spots where we deleted the old ones, as shown in the next picture.

After getting access to Virtuoso,we will be able to see our library manager. This will be useful to create a new library called Tutorial_1.

Do not forget to have the next set up before pressing OK

To edit our new library, we can follow the next path: FILE / NEW / CELL VIEW as shown in the picture 

And then we add our cell as R_div

Once we are done, this new screen will show up, at this point we can go on the long way which is Create / Instance. Or simply the shortcut, press I

we will add our resistors by selecting this configuration: 


You can simply press Q on the object to edit multiple things, such as the resistance, temperature and more. Make sure to add those as 10k, since that is the type of problem we will work on.

Follow the same path for other compenents like Ground gnd, or our Power Supppy in DC vdc

At the end, you can just press Create Narrow Wire to connect our components from the circuit

We will select Check and Save on the right corner and then we can go to Launch and ADE L to start the simulation of our circuit design.

Go to Analyses / Choose... and have this set up:

Also go to Outputs, select TO BE PLOTTED and then from the circuit design, select IN and OUT.

unfortunately did not work ;c



To finish this, i backup my files every 20min as a safe method of loosing progress. it is basically sending the files to my school email.

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